{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T22:25:14Z","timestamp":1649111114456},"reference-count":15,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"9","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. &amp; Syst."],"published-print":{"date-parts":[[2018,9,1]]},"DOI":"10.1587\/transinf.2017edp7287","type":"journal-article","created":{"date-parts":[[2018,8,31]],"date-time":"2018-08-31T22:43:08Z","timestamp":1535755388000},"page":"2258-2268","source":"Crossref","is-referenced-by-count":1,"title":["Proxy Responses by FPGA-Based Switch for MapReduce Stragglers"],"prefix":"10.1587","volume":"E101.D","author":[{"given":"Koya","family":"MITSUZUKA","sequence":"first","affiliation":[{"name":"Graduate School of Science and Technology, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michihiro","family":"KOIBUCHI","sequence":"additional","affiliation":[{"name":"National Institute of Informatics"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hideharu","family":"AMANO","sequence":"additional","affiliation":[{"name":"Graduate School of Science and Technology, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroki","family":"MATSUTANI","sequence":"additional","affiliation":[{"name":"Graduate School of Science and Technology, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] J. Dean and S. Ghemawat, \u201cMapReduce: Simplied Data Processing on Large Clusters,\u201d Proceedings of the USENIX Symposium on Operating System Design and Implementation (OSDI&apos;04), pp.137-149, Dec. 2004."},{"key":"2","unstructured":"[2] K. Ousterhout, A. Panda, J. Rosen, S. Venkataraman, R. Xin, S. Ratnasamy, S. Shenker, and I. Stoica, \u201cThe Case for Tiny Tasks in Compute Clusters,\u201d Proceedings of the USENIX Workshop on Hot Topics in Operating Systems (HotOS&apos;14), May 2013."},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] K. Mitsuzuka, A. Hayashi, M. Koibuchi, H. Amano, and H. Matsutani, \u201cIn-Switch Approximate Processing: Delayed Tasks Management for MapReduce Applications,\u201d Proceedings of the International Conference on Field-Programmable Logic and Applications (FPL&apos;17), Sept. 2017. http:\/\/www.arc.ics.keio.ac.jp\/~matutani\/mitsuzuka_fpl2017.pdf","DOI":"10.23919\/FPL.2017.8056802"},{"key":"4","unstructured":"[4] M. Zaharia, A. Konwinski, A.D. Joseph, R. Katz, and I. Stoica, \u201cImproving MapReduce Performance in Heterogeneous Environment,\u201d Proceedings of the USENIX Symposium on Operating System Design and Implementation (OSDI&apos;08), pp.29-42, Dec. 2008."},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] G. Ananthanarayanan, S. Kandula, A. Greenberg, I. Stoica, Y. Lu, B. Saha, and E. Harris, \u201cReining in the Outliers in MapReduce Clusters using Mantri,\u201d Proceedings of the USENIX Symposium on Operating System Design and Implementation (OSDI&apos;10), pp.1-16, Oct. 2010. 10.1145\/1966445.1966472","DOI":"10.1145\/1966445.1966472"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] K. Ousterhout, P. Wendell, M. Zaharia, and I. Stoica, \u201cSparrow: Distributed, Low Latency Scheduling,\u201d Proceedings of the ACM Symposium on Operating Systems Principles (SOSP&apos;13), pp.69-84, Nov. 2013. 10.1145\/2517349.2522716","DOI":"10.1145\/2517349.2522716"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] M. Shafique, W. Ahmad, R. Hafiz, and J. Henkel, \u201cA Low Latency Generic Accuracy Configurable Adder,\u201d Proceedings of the Annual Design Automation Conference (DAC&apos;15), pp.86:1-86:6, June 2015. 10.1145\/2744769.2744778","DOI":"10.1145\/2744769.2744778"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] M. Shafique, R. Hafiz, S. Rehman, W. El-Harouni, and J. Henkel, \u201cInvited-Cross-layer Approximate Computing: From Logic to Architectures,\u201d Proceedings of the Annual Design Automation Conference (DAC&apos;16), pp.1-6, June 2016. 10.1145\/2897937.2906199","DOI":"10.1145\/2897937.2906199"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] I. Goiri, R. Bianchini, S. Nagarakatte, and T.D. Nguyen, \u201cApproxHadoop: Bringing Approximations to MapReduce Frameworks,\u201d Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS&apos;15), pp.383-397, March 2015. 10.1145\/2694344.2694351","DOI":"10.1145\/2694344.2694351"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] T. Honjo and K. Oikawa, \u201cHardware Acceleration of Hadoop MapReduce,\u201d Proceedings of the International Conference on Big Data (BigData&apos;13), pp.118-124, Oct. 2013. 10.1109\/bigdata.2013.6691562","DOI":"10.1109\/BigData.2013.6691562"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] D. Diamantopoulos and C. Kachris, \u201cHigh-level Synthesizable Dataflow MapReduce Accelerator for FPGA-coupled Data Centers,\u201d Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), pp.26-33, July 2015. 10.1109\/samos.2015.7363656","DOI":"10.1109\/SAMOS.2015.7363656"},{"key":"12","unstructured":"[12] G. Salton, Automatic Text Processing: The Transformation, Analysis, and Retrieval of Information by Computer, Addison-Wesley, 1989."},{"key":"13","unstructured":"[13] \u201cThe NetFPGA Project.\u201d http:\/\/netfpga.org\/"},{"key":"14","unstructured":"[14] \u201cThe Apache Hadoop Project.\u201d http:\/\/hadoop.apache.org\/"},{"key":"15","unstructured":"[15] \u201cOSNT 10G Home.\u201d https:\/\/github.com\/NetFPGA\/OSNT-Public\/wiki\/OSNT-10G-Home"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E101.D\/9\/E101.D_2017EDP7287\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,23]],"date-time":"2019-10-23T10:08:42Z","timestamp":1571825322000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E101.D\/9\/E101.D_2017EDP7287\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,9,1]]},"references-count":15,"journal-issue":{"issue":"9","published-print":{"date-parts":[[2018]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2017edp7287","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"value":"0916-8532","type":"print"},{"value":"1745-1361","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,9,1]]}}}