{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,7,22]],"date-time":"2022-07-22T22:29:47Z","timestamp":1658528987900},"reference-count":13,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"5","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. &amp; Syst."],"published-print":{"date-parts":[[2019,5,1]]},"DOI":"10.1587\/transinf.2018edl8234","type":"journal-article","created":{"date-parts":[[2019,4,30]],"date-time":"2019-04-30T18:20:47Z","timestamp":1556648447000},"page":"1085-1088","source":"Crossref","is-referenced-by-count":2,"title":["An Optimized Low-Power Optical Memory Access Network for Kilocore Systems"],"prefix":"10.1587","volume":"E102.D","author":[{"given":"Tao","family":"LIU","sequence":"first","affiliation":[{"name":"State Key Laboratory of Integrated Service Networks, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Huaxi","family":"GU","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Service Networks, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yue","family":"WANG","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Service Networks, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei","family":"ZOU","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Service Networks, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N.P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R.G. Beausoleil, and J.H. Ahn, \u201cCorona: System implications of emerging nanophotonic technology,\u201d 2008 International Symposium on Computer Architecture, pp.153-164, June 2008. 10.1109\/isca.2008.35","DOI":"10.1109\/ISCA.2008.35"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] S. Le Beux, J. Trajkovic, I. O&apos;Connor, G. Nicolescu, G. Bois, and P. Paulin, \u201cOptical ring network-on-chip (ORNoC): Architecture and design methodology,\u201d 2011 Design, Automation &amp; Test in Europe, pp.1-6, March 2011. 10.1109\/date.2011.5763134","DOI":"10.1109\/DATE.2011.5763134"},{"key":"3","doi-asserted-by":"publisher","unstructured":"[3] K. Wang, H. Gu, Y. Yang, and K. Wang, \u201cOptical interconnection network for parallel access to multi-rank memory in future computing systems.,\u201d Opt. Express, vol.23, no.16, pp.20480-20494, 2015. 10.1364\/oe.23.020480","DOI":"10.1364\/OE.23.020480"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] K. Wen, H. Guan, D.M. Calhoun, D. Donofrio, and J. Shalf, \u201cSilicon photonic memory interconnect for many-core architectures,\u201d 2016 IEEE High Performance Extreme Computing Conference (HPEC), pp.1-7, Sept. 2016. 10.1109\/hpec.2016.7761609","DOI":"10.1109\/HPEC.2016.7761609"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] K. Bergman, L.P. Carloni, A. Biberman, J. Chan, and G. Hendry, \u201cPhotonic network-on-chip design,\u201d Integr. Circuits Syst., vol.68, 2013.","DOI":"10.1007\/978-1-4419-9335-9"},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] K. Wang, H. Gu, Y. Yang, K. Chen, and K. Wang, \u201cOn the design of a 3D optical interconnected memory system,\u201d IEICE Electron Express, vol.11, no.19, 20140664, 2014. 10.1587\/elex.11.20140664","DOI":"10.1587\/elex.11.20140664"},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, \u201cLow-loss, low-cross-talk crossings for silicon-on-insulator nanophotonic waveguides,\u201d Opt. Lett., vol.32, no.19, pp.2801-2803, 2007. 10.1364\/ol.32.002801","DOI":"10.1364\/OL.32.002801"},{"key":"8","doi-asserted-by":"publisher","unstructured":"[8] F. Xia, L. Sekaric, and Y. Vlasov, \u201cUltracompact optical buffers on a silicon chip,\u201d Nat. Photonics, vol.1, no.1, pp.65-71, 2007. 10.1038\/nphoton.2006.42","DOI":"10.1038\/nphoton.2006.42"},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] X. Zheng, S. Lin, Y. Luo, J. Yao, G. Li, S.S. Djordjevic, J.-H. Lee, H.D. Thacker, I. Shubin, K. Raj, J.E. Cunningham, and A.V. Krishnamoorthy, \u201cEfficient WDM laser sources towards terabyte\/s silicon photonic interconnects,\u201d J. Lightwave Technol., vol.31, no.24, pp.4142-4154, Dec. 2013. 10.1109\/jlt.2013.2288917","DOI":"10.1109\/JLT.2013.2288917"},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] Y. Audzevich, P.M. Watts, A. West, A. Mujumdar, S.W. Moore, and A.W. Moore, \u201cPower optimized transceivers for future switched networks,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.22, no.10, pp.2081-2092, Oct. 2014. 10.1109\/tvlsi.2013.2283300","DOI":"10.1109\/TVLSI.2013.2283300"},{"key":"11","doi-asserted-by":"publisher","unstructured":"[11] M. Kennedy and A.K. Kodi, \u201cLaser pooling: Static and dynamic laser power allocation for on-chip optical interconnects,\u201d J. Lightwave Technol., vol.35, no.15, pp.3159-3167, Aug. 2017. 10.1109\/jlt.2017.2681960","DOI":"10.1109\/JLT.2017.2681960"},{"key":"12","unstructured":"[12] K. Schmidtke, \u201cDesigning 100G optical connections,\u201d n.p., March 2017, https:\/\/code.facebook.com\/posts\/1633153936991442\/designing-100g-optical-connections\/"},{"key":"13","unstructured":"[13] B. Jacob, S.W. Ng, and D.T. Wang, Memory systems: Cache, DRAM, disk, Morgan Kaufmann, 2008. 10.1016\/B978-0-12-379751-3.X5001-2"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E102.D\/5\/E102.D_2018EDL8234\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,3]],"date-time":"2019-05-03T23:25:01Z","timestamp":1556925901000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E102.D\/5\/E102.D_2018EDL8234\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,5,1]]},"references-count":13,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2019]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2018edl8234","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"value":"0916-8532","type":"print"},{"value":"1745-1361","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,5,1]]}}}