{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T08:44:04Z","timestamp":1648889044950},"reference-count":61,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"12","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. & Syst."],"published-print":{"date-parts":[[2018,12,1]]},"DOI":"10.1587\/transinf.2018edp7027","type":"journal-article","created":{"date-parts":[[2018,11,30]],"date-time":"2018-11-30T22:27:27Z","timestamp":1543616847000},"page":"3019-3037","source":"Crossref","is-referenced-by-count":0,"title":["Cooperative GPGPU Scheduling for Consolidating Server Workloads"],"prefix":"10.1587","volume":"E101.D","author":[{"given":"Yusuke","family":"SUZUKI","sequence":"first","affiliation":[{"name":"Department of Information and Computer Science, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroshi","family":"YAMADA","sequence":"additional","affiliation":[{"name":"Department of Computer and Information Sciences, Tokyo University of Agriculture and Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shinpei","family":"KATO","sequence":"additional","affiliation":[{"name":"Department of Computer Science, The University of Tokyo"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kenji","family":"KONO","sequence":"additional","affiliation":[{"name":"Department of Information and Computer Science, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] Y. Jia, E. Shelhamer, J. Donahue, S. Karayev, J. Long, R. Girshick, S. Guadarrama, and T. Darrell, \u201cCaffe: Convolutional Architecture for Fast Feature Embedding,\u201d Proc. 22nd ACM International Conference on Multimedia, New York, New York, USA, pp.675-678, ACM, 2014. 10.1145\/2647868.2654889","DOI":"10.1145\/2647868.2654889"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] H. Cui, H. Zhang, G.R. Ganger, P.B. Gibbons, and E.P. Xing, \u201cGeePS: scalable deep learning on distributed GPUs with a GPU-specialized parameter server,\u201d Proc. 11th European Conference on Computer Systems, pp.1-16, ACM Press, 2016. 10.1145\/2901318.2901323","DOI":"10.1145\/2901318.2901323"},{"key":"3","unstructured":"[3] M. Abadi, P. Barham, J. Chen, Z. Chen, A. Davis, J. Dean, M. Devin, S. Ghemawat, G. Irving, M. Isard, M. Kudlur, J. Levenberg,R. Monga, S. Moore, D.G. Murray, B. Steiner, P. Tucker, V.Vasudevan, P. Warden, M. Wicke, Y. Yu, and X. Zheng,\u201cTensorFlow: A System for Large-Scale Machine Learning,\u201d Proc. 12th USENIX Conf. on Operating Systems Design and Implementation, pp.265-283, USENIX, 2016."},{"key":"4","unstructured":"[4] NVIDIA, \u201cGPU-Based Deep Learning Inference: A Performance and Power Analysis,\u201d 2015. http:\/\/developer.download.nvidia.com\/embedded\/jetson\/TX1\/docs\/jetson_tx1_whitepaper.pdf."},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] N. Maruyama, T. Nomura, K. Sato, and S. Matsuoka, \u201cPhysis: An Implicitly Parallel Programming Model for Stencil Computations on Large-Scale GPU-Accelerated Supercomputers,\u201d Proc. 2011 Int'l Conf. for High Performance Computing, Networking, Storage and Analysis, pp.11:1-11:12, ACM, 2011. 10.1145\/2063384.2063398","DOI":"10.1145\/2063384.2063398"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] T. Shimokawabe, T. Aoki, T. Takaki, T. Endo, A. Yamanaka, N. Maruyama, A. Nukada, and S. Matsuoka, \u201cPeta-scale Phase-Field Simulation for Dendritic Solidification on the TSUBAME 2.0 Supercomputer,\u201d Proc. 2011 Int'l Conf. for High Performance Computing, Networking, Storage and Analysis, pp.3:1-3:11, ACM, 2011. 10.1145\/2063384.2063388","DOI":"10.1145\/2063384.2063388"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] M. Silberstein, B. Ford, I. Keidar, and E. Witchel, \u201cGPUfs: Integrating a File System with GPUs,\u201d Proc. 18th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, pp.485-498, ACM, 2013. 10.1145\/2451116.2451169","DOI":"10.1145\/2451116.2451169"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] W. Sun, R. Ricci, and M.L. Curry, \u201cGPUstore,\u201d Proc. 5th Annual Int'l Systems and Storage Conf., pp.1-12, ACM, 2012. 10.1145\/2367589.2367595","DOI":"10.1145\/2367589.2367595"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] N. Rath, J. Bialek, P.J. Byrne, B. DeBono, J.P. Levesque, B. Li, M.E. Mauel, D.A. Maurer, G.A. Navratil, and D. Shiraki, \u201cHigh-speed, multi-input, multi-output control using GPU processing in the HBT-EP tokamak,\u201d Fusion Engineering and Design, pp.1895-1899, 2012.","DOI":"10.1016\/j.fusengdes.2012.04.003"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] S. Kato, J. Aumiller, and S. Brandt, \u201cZero-copy I\/O processing for low-latency GPU computing,\u201d Proc. 4th Int'l Conf. on Cyber-Physical Systems, pp.170-178, ACM\/IEEE, 2013. 10.1145\/2502524.2502548","DOI":"10.1145\/2502524.2502548"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] M. McNaughton, C. Urmson, J.M. Dolan, and J.-W. Lee, \u201cMotion Planning for Autonomous Driving with a Conformal Spatiotemporal Lattice,\u201d Proc. 2011 Int'l Conf. on Robotics and Automation, pp.4889-4895, IEEE, 2011. 10.1109\/icra.2011.5980223","DOI":"10.1109\/ICRA.2011.5980223"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] M. Hirabayashi, S. Kato, M. Edahiro, K. Takeda, T. Kawano, and S. Mita, \u201cGPU Implementations of Object Detection using HOG Features and Deformable Models,\u201d Proc. 1st Int'l Conf. on Cyber-Physical Systems, Networks, and Applications, pp.106-111, IEEE, 2013. 10.1109\/cpsna.2013.6614255","DOI":"10.1109\/CPSNA.2013.6614255"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] S. Han, K. Jang, K. Park, and S. Moon, \u201cPacketShader: A GPU-Accelerated Software Router,\u201d Proc. ACM SIGCOMM 2010 Conf., pp.195-206, ACM, 2010. 10.1145\/1851182.1851207","DOI":"10.1145\/1851182.1851207"},{"key":"14","unstructured":"[14] K. Jang, S. Han, S. Han, S. Moon, and K. Park, \u201cSSLShader: Cheap SSL Acceleration with Commodity Processors,\u201d Proc. 8th USENIX Conf. on Networked Systems Design and Implementation, pp.1-14, USENIX, 2011."},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] S.R. Agrawal and A.R. Lebeck, \u201cRhythm: Harnessing Data Parallel Hardware for Server Workloads,\u201d Proc. 19th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, pp.19-34, ACM, 2014.","DOI":"10.1145\/2541940.2541956"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] T.H. Hetherington, M. O'Connor, and T.M. Aamodt,\u201cMemcachedGPU: Scaling-up Scale-out Key-value Stores,\u201d Proc. 6th ACM Symp. on Cloud Computing, pp.43-57, ACM, 2015. 10.1145\/2806777.2806836","DOI":"10.1145\/2806777.2806836"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] T. Kaldewey, G. Lohman, R. Mueller, and P. Volk, \u201cGPU Join Processing Revisited,\u201d Proc. 8th Int'l Workshop on Data Management on New Hardware, pp.55-62, ACM, 2012. 10.1145\/2236584.2236592","DOI":"10.1145\/2236584.2236592"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] B. He, K. Yang, R. Fang, M. Lu, N. Govindaraju, Q. Luo, and P. Sander, \u201cRelational Joins on Graphics Processors,\u201d Proc. 2008 ACM SIGMOD Int'l Conf. on Management of Data, pp.511-524, ACM, 2008. 10.1145\/1376616.1376670","DOI":"10.1145\/1376616.1376670"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] C. Kim, J. Chhugani, N. Satish, E. Sedlar, A.D. Nguyen, T. Kaldewey, V.W. Lee, S.A. Brandt, and P. Dubey, \u201cFAST: Fast Architecture Sensitive Tree Search on Modern CPUs and GPUs,\u201d Proc. 2010 Int'l Conf. on Management of Data, pp.339-350, ACM, 2010. 10.1145\/1807167.1807206","DOI":"10.1145\/1807167.1807206"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] N. Satish, C. Kim, J. Chhugani, A.D. Nguyen, V.W. Lee, D. Kim, and P. Dubey, \u201cFast Sort on CPUs and GPUs: A Case for Bandwidth Oblivious SIMD Sort,\u201d Proc. 2010 Int'l Conf. on Management of Data, pp.351-362, ACM, 2010. 10.1145\/1807167.1807207","DOI":"10.1145\/1807167.1807207"},{"key":"21","unstructured":"[21] A. Belay, G. Prekas, A. Klimovic, S. Grossman, C. Kozyrakis, and E. Bugnion, \u201cIX: A Protected Dataplane Operating System for High Throughput and Low Latency,\u201d Proc. 11th USENIX Conf. on Operating Systems Design and Implementation, USENIX, 2014."},{"key":"22","unstructured":"[22] NVIDIA, \u201cNVIDIA Tesla P100-The Most Advanced Datacenter Accelerator Ever Built Featuring Pascal GP100, the World's Fastest GPU,\u201d 2016. http:\/\/www.nvidia.com\/object\/pascal-architecture-whitepaper.html."},{"key":"23","unstructured":"[23] S. Kim, S. Huh, X. Zhang, Y. Hu, A. Wated, E. Witchel, and M.Silberstein, \u201cGPUnet: Networking Abstractions for GPU Programs,\u201d Proc. 11th USENIX Conf. on Operating Systems Design and Implementation, pp.201-216, USENIX, 2014."},{"key":"24","unstructured":"[24] S. Kato, K. Lakshmanan, R. Rajkumar, and Y. Ishikawa, \u201cTimeGraph: GPU Scheduling for Real-Time Multi-Tasking Environments,\u201d Proc. 2011 USENIX Annual Technical Conf., pp.17-30, USENIX, 2011."},{"key":"25","doi-asserted-by":"crossref","unstructured":"[25] K. Menychtas, K. Shen, and M.L. Scott, \u201cDisengaged scheduling for fair, protected access to fast computational accelerators,\u201d Proc. 19th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, pp.301-316, ACM, 2014. 10.1145\/2541940.2541963","DOI":"10.1145\/2541940.2541963"},{"key":"26","unstructured":"[26] Y. Suzuki, S. Kato, H. Yamada, and K. Kono, \u201cGPUvm: Why Not Virtualizing GPUs at the Hypervisor?,\u201d Proc. 2014 USENIX Annual Technical Conf., pp.109-120, USENIX, 2014."},{"key":"27","unstructured":"[27] S. Kato, M. McThrow, C. Maltzahn, and S. Brandt, \u201cGdev: First-Class GPU Resource Management in the Operating System,\u201d Proc. 2012 USENIX Annual Technical Conf., pp.401-412, USENIX, 2012."},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] C.J. Rossbach, J. Currey, M. Silberstein, B. Ray, and E. Witchel, \u201cPTask: Operating System Abstractions To Manage GPUs as Compute Devices,\u201d Proc. 23rd Symp. on Operating Systems Principles, pp.233-248, ACM, 2011. 10.1145\/2043556.2043579","DOI":"10.1145\/2043556.2043579"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] G. Chen, Y. Zhao, X. Shen, and H. Zhou, \u201cEffiSha: A Software Framework for Enabling Effficient Preemptive Scheduling of GPU,\u201d Proc. 22nd ACM SIGPLAN Symp. on Principles and Practice of Parallel Programming, pp.3-16, ACM, 2017. 10.1145\/3018743.3018748","DOI":"10.1145\/3018743.3018748"},{"key":"30","doi-asserted-by":"crossref","unstructured":"[30] B. Wu, X. Liu, X. Zhou, and C. Jiang, \u201cFLEP: Enabling Flexible and Efficient Preemption on GPUs,\u201d Proc. 22nd Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, pp.483-496, ACM, 2017.","DOI":"10.1145\/3037697.3037742"},{"key":"31","unstructured":"[31] NVIDIA, \u201cMulti-Process Service,\u201d 2015. https:\/\/docs.nvidia.com\/deploy\/pdf\/CUDA_Multi_Process_Service_Overview.pdf."},{"key":"32","doi-asserted-by":"crossref","unstructured":"[32] L. Wang, M. Huang, and T. El-Ghazawi, \u201cExploiting Concurrent Kernel Execution on Graphic Processing Units,\u201d Proc. Int'l Conf. on High Performance Computing and Simulation, pp.24-32, IEEE, 2011. 10.1109\/hpcsim.2011.5999803","DOI":"10.1109\/HPCSim.2011.5999803"},{"key":"33","doi-asserted-by":"crossref","unstructured":"[33] K. Gupta, J.A. Stuart, and J.D. Owens, \u201cA Study of Persistent Threads Style GPU Programming for GPGPU Workloads,\u201d Proc. Innovative Parallel Computing, pp.1-14, IEEE, 2012. 10.1109\/inpar.2012.6339596","DOI":"10.1109\/InPar.2012.6339596"},{"key":"34","unstructured":"[34] D. Schatzberg, J. Cadden, H. Dong, O. Krieger, and J. Appavoo, \u201cEbbRT: A Framework for Building Per-Application Library Operating Systems,\u201d Proc. 12th USENIX Conf. on Operating Systems Design and Implementation, pp.671-688, USENIX, 2016."},{"key":"35","doi-asserted-by":"crossref","unstructured":"[35] Y. Suzuki, H. Yamada, S. Kato, and K. Kono, \u201cGloop: An event-driven runtime for consolidating gpgpu applications,\u201d Proc. 2017 Symposium on Cloud Computing, pp.80-93, ACM, 2017. 10.1145\/3127479.3132023","DOI":"10.1145\/3127479.3132023"},{"key":"36","doi-asserted-by":"crossref","unstructured":"[36] T. Aila and S. Laine, \u201cUnderstanding the Efficiency of Ray Traversal on GPUs,\u201d Proc. Conf. on High Performance Graphics, pp.145-149, ACM, 2009. 10.1145\/1572769.1572792","DOI":"10.1145\/1572769.1572792"},{"key":"37","doi-asserted-by":"crossref","unstructured":"[37] L. Zeno, A. Mendelson, and M. Silberstein, \u201cGPUpIO: The Case for I\/O-Driven Preemption on GPUs,\u201d Proc. 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit, pp.63-71, ACM, 2016. 10.1145\/2884045.2884053","DOI":"10.1145\/2884045.2884053"},{"key":"38","doi-asserted-by":"crossref","unstructured":"[38] S. Pai, M.J. Thazhuthaveetil, and R. Govindarajan, \u201cImproving GPGPU concurrency with elastic kernels,\u201d Proc. 18th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, p.407, ACM, 2013. 10.1145\/2451116.2451160","DOI":"10.1145\/2451116.2451160"},{"key":"39","doi-asserted-by":"crossref","unstructured":"[39] A. Goswami, J. Young, K. Schwan, N. Farooqui, A. Gavrilovska, M. Wolf, and G. Eisenhauer, \u201cGPUShare: Fair-Sharing Middleware for GPU Clouds,\u201d 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, pp.1769-1776, IEEE, 2016. 10.1109\/ipdpsw.2016.94","DOI":"10.1109\/IPDPSW.2016.94"},{"key":"40","unstructured":"[40] NVIDIA, \u201cNVIDIA TESLA V100 GPU ARCHITECTURE,\u201d 2017."},{"key":"41","doi-asserted-by":"crossref","unstructured":"[41] C.J. Rossbach, Y. Yu, J. Currey, J.-P. Martin, and D. Fetterly,\u201cDandelion: a Compiler and Runtime for Heterogeneous Systems,\u201d Proc. 24th Symp. on Operating Systems Principles, pp.49-68, ACM, 2013. 10.1145\/2517349.2522715","DOI":"10.1145\/2517349.2522715"},{"key":"42","doi-asserted-by":"crossref","unstructured":"[42] J.A. Stuart and J.D. Owens, \u201cMulti-GPU MapReduce on GPU Clusters,\u201d Proc. 2011 Int'l Parallel & Distributed Processing Symp., pp.1068-1079, IEEE, 2011. 10.1109\/ipdps.2011.102","DOI":"10.1109\/IPDPS.2011.102"},{"key":"43","unstructured":"[43] AMD, \u201cAMD Kaveri.\u201d http:\/\/www.amd.com\/en-us\/products\/processors\/desktop\/a-series-apu."},{"key":"44","unstructured":"[44] N. Foundation, \u201cNode.js,\u201d 2016. https:\/\/nodejs.org."},{"key":"45","doi-asserted-by":"crossref","unstructured":"[45] M. Gottschlag, M. Hillenbrand, J. Kehne, J. Stoess, and F.Bellosa, \u201cLoGV: Low-overhead GPGPU Virtualization,\u201d Proc. 4th Int'l Workshop on Frontiers of Heterogeneous Computing, pp.1721-1726, IEEE, 2013.","DOI":"10.1109\/HPCC.and.EUC.2013.245"},{"key":"46","doi-asserted-by":"publisher","unstructured":"[46] J. Kehne, J. Metter, and F. Bellosa, \u201cGPUswap: Enabling Oversubscription of GPU Memory through Transparent Swapping,\u201d Proc. 11th ACM Int'l Conf. on Virtual Execution Environments, pp.65-77, ACM, 2015. 10.1145\/2817817.2731192","DOI":"10.1145\/2817817.2731192"},{"key":"47","doi-asserted-by":"crossref","unstructured":"[47] S. Che, M. Boyer, J. Meng, D. Tarjan, J.W. Sheaffer, S.-H. Lee, and K. Skadron, \u201cRodinia: A Benchmark Suite for Heterogeneous Computing,\u201d Proc. 2009 Int'l Symp. on Workload Characterization, pp.44-54, IEEE, 2009. 10.1109\/iiswc.2009.5306797","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"48","unstructured":"[48] NVIDIA, \u201cCUDA Pro Tip: Occupancy API Simplifies Launch Configuration,\u201d 2014. https:\/\/devblogs.nvidia.com\/parallelforall\/cuda-pro-tip-occupancy-api-simplifies-launch-configuration\/."},{"key":"49","doi-asserted-by":"publisher","unstructured":"[49] A.G. Greenberg and N. Madras, \u201cHow fair is fair queuing,\u201d Journal of the ACM, vol.39, no.3, pp.568-598, 1992. 10.1145\/146637.146658","DOI":"10.1145\/146637.146658"},{"key":"50","doi-asserted-by":"crossref","unstructured":"[50] S. Kato, K. Lakshmanan, A. Kumar, M. Kelkar, Y. Ishikawa, and R. Rajkumar, \u201cRGEM: A responsive GPGPU execution model for runtime engines,\u201d Proc. 32nd Real-Time Systems Symposium, pp.57-66, IEEE, 2011. 10.1109\/rtss.2011.13","DOI":"10.1109\/RTSS.2011.13"},{"key":"51","unstructured":"[51] K. Tian, Y. Dong, and D. Cowperthwaite, \u201cA Full GPU Virtualization Solution with Mediated Pass-Through,\u201d Proc. 2014 USENIX Annual Technical Conf., pp.121-132, USENIX, 2014."},{"key":"52","doi-asserted-by":"crossref","unstructured":"[52] V. Gupta, A. Gavrilovska, K. Schwan, H. Kharche, N. Tolia, V. Talwar, and P. Ranganathan, \u201cGViM: GPU-Accelerated Virtual Machines,\u201d Proc. 3rd Workshop on System-level Virtualization for High Performance Computing, pp.17-24, ACM, 2009. 10.1145\/1519138.1519141","DOI":"10.1145\/1519138.1519141"},{"key":"53","unstructured":"[53] V. Gupta, K. Schwan, N. Tolia, V. Talwar, and P. Ranganathan, \u201cPegasus: Coordinated Scheduling for Virtualized Accelerator-based Systems,\u201d Proc. 2011 USENIX Annual Technical Conf., pp.31-44, USENIX, 2011."},{"key":"54","unstructured":"[54] L.O.S. Community, \u201cMemory Mapped I\/O Trace.\u201d https:\/\/nouveau.freedesktop.org\/wiki\/MmioTrace\/."},{"key":"55","unstructured":"[55] NVIDIA, \u201cNVIDIA's next generation CUDA computer architecture: Kepler GK110,\u201d 2012. http:\/\/www.nvidia.com\/."},{"key":"56","unstructured":"[56] NVIDIA, \u201cParallel Thread Execution ISA Version 6.2,\u201d 2018. https:\/\/docs.nvidia.com\/cuda\/parallel-thread-execution\/index.html."},{"key":"57","unstructured":"[57] J.A. Stratton, C. Rodrigues, I.J. Sung, N. Obeid, L.W. Chang, N. Anssari, G.D. Liu, and W.m.W. Hwu, \u201cParboil: A revised benchmark suite for scientific and commercial throughput computing,\u201d Technical Report IMPACT-12-01, 2012."},{"key":"58","doi-asserted-by":"publisher","unstructured":"[58] M.C. Schatz, C. Trapnell, A.L. Delcher, and A. Varshney, \u201cHigh-throughput sequence alignment using Graphics Processing Units,\u201d BMC bioinformatics, vol.8, no.1, p.474, 2007. 10.1186\/1471-2105-8-474","DOI":"10.1186\/1471-2105-8-474"},{"key":"59","doi-asserted-by":"publisher","unstructured":"[59] E. Sintorn and U. Assarsson, \u201cFast parallel GPU-sorting using a hybrid algorithm,\u201d Journal of Parallel and Distributed Computing, vol.68, no.10, pp.1381-1388, 2008. 10.1016\/j.jpdc.2008.05.012","DOI":"10.1016\/j.jpdc.2008.05.012"},{"key":"60","doi-asserted-by":"crossref","unstructured":"[60] M. Hidaka, Y. Kikura, Y. Ushiku, and T. Harada, \u201cWebDNN: Fastest DNN Execution Framework on Web Browser,\u201d Proc. 2017 ACM on Multimedia Conference, pp.1213-1216, ACM, 2017. 10.1145\/3123266.3129394","DOI":"10.1145\/3123266.3129394"},{"key":"61","doi-asserted-by":"crossref","unstructured":"[61] G.F. Diamos, A.R. Kerr, S. Yalamanchili, and N. Clark, \u201cOcelot: A Dynamic Optimization Framework for Bulk-Synchronous Applications in Heterogeneous Systems,\u201d Proc. 19th Int'l Conf. on Parallel Architectures and Compilation Techniques, pp.353-364, ACM, 2010. 10.1145\/1854273.1854318","DOI":"10.1145\/1854273.1854318"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E101.D\/12\/E101.D_2018EDP7027\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,12,1]],"date-time":"2018-12-01T04:23:12Z","timestamp":1543638192000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E101.D\/12\/E101.D_2018EDP7027\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12,1]]},"references-count":61,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2018]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2018edp7027","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"value":"0916-8532","type":"print"},{"value":"1745-1361","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,12,1]]}}}