{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,20]],"date-time":"2024-09-20T16:30:49Z","timestamp":1726849849981},"reference-count":25,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"5","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. &amp; Syst."],"published-print":{"date-parts":[[2019,5,1]]},"DOI":"10.1587\/transinf.2018rcp0008","type":"journal-article","created":{"date-parts":[[2019,4,30]],"date-time":"2019-04-30T18:23:45Z","timestamp":1556648625000},"page":"1037-1045","source":"Crossref","is-referenced-by-count":9,"title":["RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks"],"prefix":"10.1587","volume":"E102.D","author":[{"given":"Cheng","family":"LUO","sequence":"first","affiliation":[{"name":"Dwith State Key Laboratory of ASIC and System, Fudan University"}]},{"given":"Wei","family":"CAO","sequence":"additional","affiliation":[{"name":"Dwith State Key Laboratory of ASIC and System, Fudan University"}]},{"given":"Lingli","family":"WANG","sequence":"additional","affiliation":[{"name":"Dwith State Key Laboratory of ASIC and System, Fudan University"}]},{"given":"Philip","family":"H. W. LEONG","sequence":"additional","affiliation":[{"name":"School of Electrical and Information Engineering, University of Sydney"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] A. Krizhevsky, I. Sutskever, and G.E. Hinton, \u201cImagenet classification with deep convolutional neural networks,\u201d International Conference on Neural Information Processing Systems (NIPS), pp.1097-1105, 2012."},{"key":"2","unstructured":"[2] K. Simonyan and A. Zisserman, \u201cVery deep convolutional networks for large-scale image recognition,\u201d arXiv preprint arXiv:1409.1556, 2014."},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] R. Girshick, \u201cFast r-cnn,\u201d in IEEE international conference on computer vision (CVPR), pp.1440-1448, 2015. 10.1109\/iccv.2015.169","DOI":"10.1109\/ICCV.2015.169"},{"key":"4","unstructured":"[4] S. Ren, K. He, R. Girshick, and J. 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Nakahara, \u201cOn-chip memory based binarized convolutional deep neural network applying batch normalization free technique on an fpga,\u201d in Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, pp.98-105, 2017. 10.1109\/ipdpsw.2017.95","DOI":"10.1109\/IPDPSW.2017.95"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E102.D\/5\/E102.D_2018RCP0008\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,3]],"date-time":"2019-05-03T23:25:40Z","timestamp":1556925940000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E102.D\/5\/E102.D_2018RCP0008\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,5,1]]},"references-count":25,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2019]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2018rcp0008","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"value":"0916-8532","type":"print"},{"value":"1745-1361","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,5,1]]}}}