{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,6]],"date-time":"2024-07-06T06:00:52Z","timestamp":1720245652146},"reference-count":22,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"8","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. & Syst."],"published-print":{"date-parts":[[2021,8,1]]},"DOI":"10.1587\/transinf.2020edp7165","type":"journal-article","created":{"date-parts":[[2021,7,31]],"date-time":"2021-07-31T22:16:01Z","timestamp":1627769761000},"page":"1321-1331","source":"Crossref","is-referenced-by-count":7,"title":["Remote Dynamic Reconfiguration of a Multi-FPGA System FiC (Flow-in-Cloud)"],"prefix":"10.1587","volume":"E104.D","author":[{"given":"Kazuei","family":"HIRONAKA","sequence":"first","affiliation":[{"name":"Dept. of ICS, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kensuke","family":"IIZUKA","sequence":"additional","affiliation":[{"name":"Dept. of ICS, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Miho","family":"YAMAKURA","sequence":"additional","affiliation":[{"name":"Dept. of ICS, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Akram","family":"BEN AHMED","sequence":"additional","affiliation":[{"name":"Dept. of ICS, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hideharu","family":"AMANO","sequence":"additional","affiliation":[{"name":"Dept. of ICS, Keio University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] T. Kudoh, R. Takano, H. Amano, M. Koibuchi, H. Matsutani, T. Hanawa, T. Ikegami, K. Suzaki, A. Tanaka, E. Akanuma, S. Namiki, and K. Taura, \u201cFlow in Cloud: A dataflow centric cloud system of heterogeneous engines,\u201d TECHNICAL REPORT OF IEICE, vol.117, no.153, CPSY2017-16, pp.1-5, 2017."},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] A.M. Caulfield, E.S. Chung, A. Putnam, H. Angepat, J. Fowers, M. Haselman, S. Heil, M. Humphrey, P. Kaur, J.-Y. Kim, D. Lo, T. Massengill, K. Ovtcharov, M. Papamichael, L. Woods, S. Lanka, D. Chiou, and D. Burger, \u201cA cloud-scale acceleration architecture,\u201d 2016 49th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO), pp.1-13, 2016. 10.1109\/micro.2016.7783710","DOI":"10.1109\/MICRO.2016.7783710"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] J. Fowers, K. Ovtcharov, M. Papamichael, T. Massengill, M. Liu, D. Lo, S. Alkalay, M. Haselman, L. Adams, M. Ghandi, S. Heil,P. Patel, A. Sapek, G. Weisz, L. Woods, S. Lanka, S.K. Reinhardt, A.M. Caulfield, E.S. Chung, and D. Burger, \u201cA Configurable Cloud-Scale DNN Processor for Real-Time AI,\u201d ISCA'18, pp.1-14, June 2018. 10.1109\/isca.2018.00012","DOI":"10.1109\/ISCA.2018.00012"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] S. Byma, J.G. Steffan, H. Bannazadeh, A. Leon-Garcia, and P. Chow, \u201cFpgas in the cloud: Booting virtualized hardware accelerators with openstack,\u201d 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines, pp.109-116, May 2014. 10.1109\/fccm.2014.42","DOI":"10.1109\/FCCM.2014.42"},{"key":"5","unstructured":"[5] Amazon Web Services, Inc., \u201cAmazon EC2 F1 Instance.\u201d https:\/\/aws.amazon.com\/jp\/ec2\/instance-types\/f1\/"},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] N. Tarafdar, N. Eskandari, V. Sharma, C. Lo, and P. Chow, \u201cGalapagos: A Full Stack Approach to FPGA Integration in the Cloud,\u201d IEEE Micro, vol.38, no.6, pp.18-24, Nov. 2018. 10.1109\/mm.2018.2877290","DOI":"10.1109\/MM.2018.2877290"},{"key":"7","unstructured":"[7] Raspberry Pi Foundation, \u201cRaspberry Pi.\u201dhttps:\/\/www.raspberrypi.org\/"},{"key":"8","unstructured":"[8] Samtec, Inc., \u201cMicro Flyover On-Board Optical Engine, FireFly.\u201d https:\/\/www.samtec.com\/optics\/optical-cable\/mid-board\/firefly"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] K. Hironaka, N.A.V. Doan, and H. Amano, \u201cTowards an optimized multi FPGA architecture with STDM network: A preliminary study,\u201d Applied Reconfigurable Computing. Architectures, Tools, and Applications-14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings, vol.10824, pp.142-150, 2018. 10.1007\/978-3-319-78890-6_12","DOI":"10.1007\/978-3-319-78890-6_12"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] J. Sheng, C. Yang, T. Wang, and M.C. Herbordt, \u201cHigh performance dynamic communication on reconfigurable clusters,\u201d 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29-May 1, 2018, p.219, 2018. 10.1109\/fccm.2018.00053","DOI":"10.1109\/FCCM.2018.00053"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] R. Stefan and K. Goossens, \u201cMulti-path routing in time-division-multiplexed networks on chip,\u201d 2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC), pp.109-114, Oct. 2009. 10.1109\/vlsisoc.2009.6041339","DOI":"10.1109\/VLSISOC.2009.6041339"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] M. Schoeberl, F. Brandner, J. Spars\u00f8, and E. Kasapaki, \u201cA statically scheduled time-division-multiplexed network-on-chip for real-time systems,\u201d 2012 Sixth IEEE\/ACM International Symposium on Networks-on-Chip (NoCS), Copenhagen, Denmark, 9-11 May, 2012, pp.152-160, 2012. 10.1109\/nocs.2012.25","DOI":"10.1109\/NOCS.2012.25"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] Y. Hu, T. Kudoh, and M. Koibuchi, \u201cA case of electrical circuit switched interconnection network for parallel computers,\u201d 2017 18th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT), pp.276-283, Dec. 2017. 10.1109\/pdcat.2017.00052","DOI":"10.1109\/PDCAT.2017.00052"},{"key":"14","doi-asserted-by":"publisher","unstructured":"[14] Y. Sun and H. Amano, \u201cFic-rnn: A multi-fpga acceleration framework for deep recurrent neural networks,\u201d IEICE Transactions on Information and Systems, vol.E103-D, no.12, pp.2457-2462, 2020. 10.1587\/transinf.2020pap0003","DOI":"10.1587\/transinf.2020PAP0003"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] Y. Yamauchi, A.B. Ahmed, K. Hironaka, K. IIzuka, and H. Amano, \u201cHorizontal division of deep learning applications with all-to-all communication on a multifpga system,\u201d 2020 Eighth International Symposium on Computing and Networking Workshop (CANDARW), pp.277-281, Nov. 2020. 10.1109\/candarw51189.2020.00060","DOI":"10.1109\/CANDARW51189.2020.00060"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] M.M.I. Ullah, A.B. Ahmed, and H. Amano, \u201cImplementation of fm-index based pattern search on a multi-fpga system,\u201d Applied Reconfigurable Computing. Architectures, Tools, and Applications-16th International Symposium, ARC 2020, Toledo, Spain, April 1-3, 2020, Proceedings [postponed], ed. F. Rinc\u00f3n, J. Barba, H.K. So, P.C. Diniz, and J. Caba, Lecture Notes in Computer Science, vol.12083, pp.376-391, Springer, 2020. 10.1007\/978-3-030-44534-8_28","DOI":"10.1007\/978-3-030-44534-8_28"},{"key":"17","unstructured":"[17] Xilinx, Inc., \u201cXilinxVirtualCable.\u201d https:\/\/github.com\/Xilinx\/XilinxVirtualCable"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] A. Putnam, A.M. Caulfield, E.S. Chung, D. Chiou, K. Constantinides, J. Demme, H. Esmaeilzadeh, J. Fowers, G.P. Gopal, J. Gray, M. Haselman, S. Hauck, S. Heil, A. Hormati, J.Y. Kim, S. Lanka, J. Larus, E. Peterson, S. Pope, A. Smith, J. Thong, P.Y. Xiao, and D. Burger, \u201cA reconfigurable fabric for accelerating large-scale datacenter services,\u201d Proceeding of the 41st Annual International Symposium on Computer Architecuture, ISCA '14, Piscataway, NJ, USA, pp.13-24, IEEE Press, 2014. 10.1109\/isca.2014.6853195","DOI":"10.1109\/ISCA.2014.6853195"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] V.V. Skvortsov, M.I. Zvyagina, and A.A. Skitev, \u201cSharing resources in heterogeneous multitasking computer systems based on FPGA with the use of partial reconfiguration,\u201d 2018 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (EIConRus), pp.370-373, Jan. 2018. 10.1109\/eiconrus.2018.8317109","DOI":"10.1109\/EIConRus.2018.8317109"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] N. Tarafdar, T. Lin, N. Eskandari, D. Lion, A. Leon-Garcia, and P. Chow, \u201cHeterogeneous virtualized network function framework for the data center,\u201d 2017 27th International Conference on Field Programmable Logic and Applications (FPL), pp.1-8, Sept. 2017. 10.23919\/fpl.2017.8056790","DOI":"10.23919\/FPL.2017.8056790"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] J. Weerasinghe, R. Polig, F. Abel, and C. Hagleitner, \u201cNetwork-attached fpgas for data center applications,\u201d 2016 International Conference on Field-Programmable Technology (FPT), pp.36-43, Dec. 2016. 10.1109\/fpt.2016.7929186","DOI":"10.1109\/FPT.2016.7929186"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] P. Moorthy and N. Kapre, \u201cZedwulf: Power-performance tradeoffs of a 32-node zynq soc cluster,\u201d 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, pp.68-75, May 2015. 10.1109\/fccm.2015.37","DOI":"10.1109\/FCCM.2015.37"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E104.D\/8\/E104.D_2020EDP7165\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,8,7]],"date-time":"2021-08-07T06:17:13Z","timestamp":1628317033000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E104.D\/8\/E104.D_2020EDP7165\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,8,1]]},"references-count":22,"journal-issue":{"issue":"8","published-print":{"date-parts":[[2021]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2020edp7165","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"value":"0916-8532","type":"print"},{"value":"1745-1361","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,8,1]]},"article-number":"2020EDP7165"}}