{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,6]],"date-time":"2025-12-06T04:24:19Z","timestamp":1764995059533,"version":"3.46.0"},"reference-count":17,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"12","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. &amp; Syst."],"published-print":{"date-parts":[[2025,12,1]]},"DOI":"10.1587\/transinf.2025edl8016","type":"journal-article","created":{"date-parts":[[2025,6,9]],"date-time":"2025-06-09T18:07:30Z","timestamp":1749492450000},"page":"1631-1634","source":"Crossref","is-referenced-by-count":0,"title":["Research on FPGA Implementation of a Fire Detection System for Key Equipment in Converter Stations"],"prefix":"10.1587","volume":"E108.D","author":[{"given":"Xuemin","family":"HUANG","sequence":"first","affiliation":[{"name":"Guangzhou Bureau of China Southern Power Grid Co., Ltd. Ultra High Voltage Transmission Company"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaoliang","family":"ZHUANG","sequence":"additional","affiliation":[{"name":"Guangzhou Bureau of China Southern Power Grid Co., Ltd. Ultra High Voltage Transmission Company"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fangyuan","family":"TIAN","sequence":"additional","affiliation":[{"name":"Guangzhou Bureau of China Southern Power Grid Co., Ltd. Ultra High Voltage Transmission Company"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zheng","family":"NIU","sequence":"additional","affiliation":[{"name":"Guangzhou Bureau of China Southern Power Grid Co., Ltd. Ultra High Voltage Transmission Company"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lin","family":"PENG","sequence":"additional","affiliation":[{"name":"School of Electrical and Information Engineering, Hunan University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qian","family":"ZHOU","sequence":"additional","affiliation":[{"name":"School of Electrical and Information Engineering, Hunan University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chao","family":"YUAN","sequence":"additional","affiliation":[{"name":"School of Electrical and Information Engineering, Hunan University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] J.X. Zhang, \u201cFire detection model based on multi-scale feature fusion,\u201d Journal of Zhengzhou University, vol.42, no.5, pp.13-18, 2021. DOI: 10.13705\/j.issn.1671-6833.2021.05.016 10.13705\/j.issn.1671-6833.2021.05.016"},{"key":"2","unstructured":"[2] S. Wang and Z. Dou, ed., Fire detection and signal processing, Huazhong University of Science and Technology Press, Wuhan, 1998."},{"key":"3","unstructured":"[3] X.Y. Feng, H.Y. Sun, and W.C. Zhang, \u201cInternet of things sensor system based on optical fiber communication technology,\u201d Journal of Lasers, vol.37, no.7, pp.131-134, 2016. DOI: 10.14016\/j.cnki.jgzz.2016.07.131 10.14016\/j.cnki.jgzz.2016.07.131"},{"key":"4","unstructured":"[4] J.H. Du and Z.C. Zhang, \u201cResearch status and development trend of fire detectors,\u201d Fire Protection Technology and Product Information, no.7, pp.10-15, 2004."},{"key":"5","doi-asserted-by":"publisher","unstructured":"[5] Y. Okayama, \u201cA primitive study of a fire detection method controlled by artificial neural net,\u201d Fire Safety Journal, vol.17, no.6, pp.535-553, 1991. DOI: 10.1016\/0379-7112(91)90052-Z 10.1016\/0379-7112(91)90052-Z","DOI":"10.1016\/0379-7112(91)90052-Z"},{"key":"6","unstructured":"[6] W.D. Zhao, W.G. Li, and H.Y. Xiong, \u201cApplication of a novel BP neural network model in fire detection information processing,\u201d Journal of Railway Science and Engineering, vol.12, no.5, pp.1212-1218, 2015. DOI: 10.19713\/j.cnki.43-1423\/u.2015.05.034 10.19713\/j.cnki.43-1423\/u.2015.05.034"},{"key":"7","unstructured":"[7] K. Hu, H.Y. Cong, H. Yan, Y.F. Zhang, and Y. Li, \u201cFunction verification method of accelerated Flash series FPGA chip,\u201d Electronics &amp; Packaging, vol.22, no.9, pp.64-67, 2022. DOI: 10.16257\/j.cnki.1681-1070.2022.0913 10.16257\/j.cnki.1681-1070.2022.0913"},{"key":"8","unstructured":"[8] M.C. Zhu, \u201cFPGA dynamic reconfigurable technology and its application,\u201d Electronic Product World, pp.13-14, 2005."},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] D.X. Kong, Z.M. Fu, Y.J. Deng, and R.Q. Wang, \u201cA reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver, \u201d IEICE Electron. Express, vol.22, no.3, p.20240705, 2025. DOI: 10.1587\/elex.21.20240705 10.1587\/elex.21.20240705","DOI":"10.1587\/elex.21.20240705"},{"key":"10","unstructured":"[10] R. Fang, J.H. Liu, Z.H. Xue, and G.G. Yang, \u201cDesign of FPGA parallel acceleration scheme for convolutional neural network,\u201d Computer Engineering and Applications, vol.51, no.8, pp.32-36, 2015."},{"key":"11","doi-asserted-by":"publisher","unstructured":"[11] Y. Fukushima, K. Iizuka, and H. Amano, \u201cParallel Implementation of CNN on Multi-FPGA Cluster,\u201d IEICE Trans. Inf. &amp; Syst., vol.E106-D, no.7, pp.1198-1208, 2023. DOI: 10.1587\/transinf.2022EDP7175 10.1587\/transinf.2022EDP7175","DOI":"10.1587\/transinf.2022EDP7175"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] D.E. Rumelhart, G.E. Hinton, and R.J. Williams, \u201cLearning representations by back-propagating errors,\u201d Nature, vol.323, no.6088, pp.533-536, 1986. DOI: 10.1038\/323533a0 10.1038\/323533a0","DOI":"10.1038\/323533a0"},{"key":"13","unstructured":"[13] C.M. Bishop, Pattern Recognition and Machine Learning, Springer, 2006."},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] J.M. Dang, H.Y. Yu, F. Song, Y.I. Wang, and Y.J. Sun, \u201cCO sensor for early fire detection,\u201d Optics and Precision Engineering, vol.26, no.8, pp.1876-1881, 2018.","DOI":"10.3788\/OPE.20182608.1876"},{"key":"15","unstructured":"[15] H.S. Tan, J.M. Xu, and J.X. Zhang, \u201cOptimal design of FPGA realization structure of BP neural network,\u201d Computer Engineering and Applications, vol.58, no.21, pp.265-269, 2022."},{"key":"16","doi-asserted-by":"publisher","unstructured":"[16] A. Armato, L. Fanucci, E.P. Scilingo, and D. De Rossi, \u201cLow-error digital hardware implementation of artificial neuron activation functions and their derivative,\u201d Microprocessors &amp; Microsystems, vol.35, no.6, pp.557-567, 2011. DOI: 10.1016\/j.micpro.2011.05.007 10.1016\/j.micpro.2011.05.007","DOI":"10.1016\/j.micpro.2011.05.007"},{"key":"17","doi-asserted-by":"publisher","unstructured":"[17] K. Basterretxea, J.M. Tarela, and I. del Campo, \u201cDigital design of Sigmoid approximator for artificial neural networks,\u201d Electronics Letters, vol.38, no.1, pp.35-37, 2002. DOI: 10.1049\/el:20020008 10.1049\/el:20020008","DOI":"10.1049\/el:20020008"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E108.D\/12\/E108.D_2025EDL8016\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,6]],"date-time":"2025-12-06T03:27:37Z","timestamp":1764991657000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E108.D\/12\/E108.D_2025EDL8016\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,12,1]]},"references-count":17,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2025]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2025edl8016","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"type":"print","value":"0916-8532"},{"type":"electronic","value":"1745-1361"}],"subject":[],"published":{"date-parts":[[2025,12,1]]},"article-number":"2025EDL8016"}}