{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,26]],"date-time":"2025-09-26T13:07:25Z","timestamp":1758892045474},"reference-count":23,"publisher":"Information Processing Society of Japan","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IPSJ Transactions on System LSI Design Methodology"],"published-print":{"date-parts":[[2011]]},"DOI":"10.2197\/ipsjtsldm.4.193","type":"journal-article","created":{"date-parts":[[2011,8,10]],"date-time":"2011-08-10T06:22:49Z","timestamp":1312957369000},"page":"193-209","source":"Crossref","is-referenced-by-count":1,"title":["Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture"],"prefix":"10.2197","volume":"4","author":[{"given":"Ratna","family":"Krishnamoorthy","sequence":"first","affiliation":[]},{"given":"Saptarsi","family":"Das","sequence":"additional","affiliation":[]},{"given":"Keshavan","family":"Varadarajan","sequence":"additional","affiliation":[]},{"given":"Mythri","family":"Alle","sequence":"additional","affiliation":[]},{"given":"Masahiro","family":"Fujita","sequence":"additional","affiliation":[]},{"given":"S K","family":"Nandy","sequence":"additional","affiliation":[]},{"given":"Ranjani","family":"Narayan","sequence":"additional","affiliation":[]}],"member":"1012","reference":[{"key":"1","unstructured":"1) Alle, M., Varadarajan, K., Fell, A., Reddy C., R., Joseph, N., Das, S., Biswas, P., Chetia, J., Rao, A., Nandy, S.K. and Narayan, R.: REDEFINE: Runtime reconfigurable polymorphic ASIC, ACM Trans. Embed. Comput. Syst.<\/i>, Vol.9, No.2, pp.1-48 (2009)."},{"key":"2","unstructured":"2) Alle, M., Varadarajan, K., Fell, A., Nandy, S.K. and Narayan, R.: Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures, Proc. 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications<\/i>, Berlin, Heidelberg, pp.204-215, Springer-Verlag (2009)."},{"key":"3","doi-asserted-by":"crossref","unstructured":"3) Bobda, C.: Introduction to Reconfigurable Computing: Architectures, Algorithms, and Applications<\/i>, Springer Publishing Company, Incorporated (2007).","DOI":"10.1007\/978-1-4020-6100-4"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/12.773794"},{"key":"5","unstructured":"5) Lattner, C. and Adve, V.: LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation, CGO '04: Proc. International Symposium on Code Generation and Optimization<\/i>, Washington, DC, USA, p.75, IEEE Computer Society (2004)."},{"key":"6","unstructured":"6) DeHon, A. and Wawrzynek, J.: Reconfigurable computing: what, why, and implications for design automation, DAC '99: Proc. 36th Annual ACM\/IEEE Design Automation Conference<\/i>, New York, NY, USA, pp.610-615, ACM (1999)."},{"key":"7","unstructured":"7) Fell, A., Alle, M., Varadarajan, K., Biswas, P., Das, S., Chetia, J., Nandy, S.K. and Narayan, R.: Streaming FFT on REDEFINE-v2: An application-architecture design space exploration, Proc. 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems<\/i>, CASES '09<\/i>, New York, NY, USA, pp.127-136, ACM (2009)."},{"key":"8","doi-asserted-by":"crossref","unstructured":"8) Fell, A., Chetia, J., Biswas, P., Narayan, R. and Nandy, S.K.: Generic Routing Rules and a Scalable Access Enhancement for the Network-on-Chip RECONNECT, IEEE International SOC Conference<\/i> (SoCC<\/i>) (2009).","DOI":"10.1109\/SOCCON.2009.5398048"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/12.773795"},{"key":"10","unstructured":"10) Girvan, M. and Newman, M.E.J.: Community structure in social and biological networks, Proc. National Academy of Sciences of the United States of America<\/i>, Vol.99, No.12, pp.7821-7826 (2002)."},{"key":"11","unstructured":"11) Hartenstein, R.: A decade of reconfigurable computing: A visionary retrospective, Proc. Design, Automation and Test in Europe<\/i> (DATE<\/i>), pp.642-649 (2000)."},{"key":"12","unstructured":"12) Kernighan, B.W. and Lin, S.: An Efficient Heuristic Procedure for Partitioning Graphs, The Bell System Technical Journal<\/i>, Vol.49, No.1, pp.291-307 (1970)."},{"key":"13","unstructured":"13) Krishnamoorthy, R., Varadarajan, K., Garga, G., Alle, M., Nandy, S.K., Narayan, R. and Fujita, M.: Towards Minimizing Execution Delays on Dynamically Reconfigurable Processors: A case study on REDEFINE, Proc. 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems<\/i>, CASES '10<\/i>, New York, NY, USA, ACM (2010)."},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1145\/384265.291018"},{"key":"15","unstructured":"15) Mahlke, S.A., Lin, D.C., Chen, W.Y., Hank, R.E. and Bringmann, R.A.: Effective Compiler Support for Predicated Execution Using the Hyperblock, MICRO 25: Proc. 25th Annual International Symposium on Microarchitecture<\/i>, Portland, Oregon, pp.45-54, IEEE Computer Society TC-MICRO and ACM SIGMICRO (1992)."},{"key":"16","doi-asserted-by":"crossref","unstructured":"16) Pandey, A. and Vemuri, R.: Combined Temporal Partitioning and Scheduling for Reconfigurable Architectures, SPIE Conference on Configurable Computing: Technology and Applications<\/i> (1999).","DOI":"10.1117\/12.359528"},{"key":"17","unstructured":"17) Paulin, P.G. and Knight, J.P.: Force-directed scheduling in automatic data path synthesis, DAC '87: Proc. 24th ACM\/IEEE Design Automation Conference<\/i>, New York, NY, USA, pp.195-202, ACM (1987)."},{"key":"18","unstructured":"18) Paulin, P.G. and Knight, J.P.: Scheduling and binding algorithms for high-level synthesis, DAC '89: Proc. 26th ACM\/IEEE Design Automation Conference<\/i>, New York, NY, USA, pp.1-6, ACM (1989)."},{"key":"19","unstructured":"19) Sankaralingam, K., Nagarajan, R., Liu, H., Kim, C., Huh, J., Burger, D., Keckler, S.W. and Moore, C.R.: Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture, Proc. 30th Ann. Intl Symp. on Computer Architecture<\/i> (30th ISCA 2003<\/i>), FCRC'03, ACM Computer Architecture News<\/i> (CAN<\/i>), San Diego, CA, pp.422-432, ACM SIGARCH\/IEEE CS (2003). Published as Proc. 30th Ann. Intl Symp. on Computer Architecture<\/i> (30th ISCA 2003<\/i>), FCRC'03<\/i>, ACM Computer Architecture News<\/i> (CAN<\/i>), Vol.31, No.2, UT Austin."},{"key":"20","unstructured":"20) Swanson, S., Schwerin, A., Mercaldi, M., Petersen, A., Putnam, A., Michelson, K., Oskin, M. and Eggers, S.J.: The WaveScalar architecture, ACM Trans. Comput. Syst.<\/i>, Vol.25, No.2, pp.1-54 (2007)."},{"key":"21","unstructured":"21) Taylor, M.B., Lee, J.-w., Seneski, M. and Frank, M.: The RAW Microprocessor: A Computational Fabric for Software Circuits and General-Purpose programs Microprocessor, Ieee Micro<\/i>, pp.25-35 (2002)."},{"key":"22","unstructured":"22) Trimberger, S.: Scheduling designs into a time-multiplexed FPGA, FPGA '98: Proc. 1998 ACM\/SIGDA 6th International Symposium on Field Programmable Gate Arrays<\/i>, New York, NY, USA, pp.153-160, ACM (1998)."},{"key":"23","unstructured":"23) Yang, H. and Wong, D.F.: Efficient network flow based min-cut balanced partitioning, ICCAD '94: Proc. 1994 IEEE\/ACM International Conference on Computer-aided design<\/i>, Los Alamitos, CA, USA, pp.50-55, IEEE Computer Society Press (1994)."}],"container-title":["IPSJ Transactions on System LSI Design Methodology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/www.jstage.jst.go.jp\/article\/ipsjtsldm\/4\/0\/4_0_193\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,1]],"date-time":"2021-12-01T01:13:19Z","timestamp":1638321199000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.jstage.jst.go.jp\/article\/ipsjtsldm\/4\/0\/4_0_193\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011]]},"references-count":23,"URL":"https:\/\/doi.org\/10.2197\/ipsjtsldm.4.193","relation":{},"ISSN":["1882-6687"],"issn-type":[{"value":"1882-6687","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011]]}}}