{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,20]],"date-time":"2025-10-20T14:42:44Z","timestamp":1760971364117,"version":"build-2065373602"},"reference-count":43,"publisher":"Verein zur Forderung des Open Access Publizierens in den Quantenwissenschaften","license":[{"start":{"date-parts":[[2025,10,20]],"date-time":"2025-10-20T00:00:00Z","timestamp":1760918400000},"content-version":"unspecified","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"National Science Foundation of China Grants","award":["62325210"],"award-info":[{"award-number":["62325210"]}]},{"name":"National Science Foundation of China Grants","award":["92465202"],"award-info":[{"award-number":["92465202"]}]},{"name":"National Science Foundation of China Grants","award":["62272441"],"award-info":[{"award-number":["62272441"]}]},{"name":"Strategic Priority Research Program of Chinese Academy of Sciences Grant","award":["XDB28000000"],"award-info":[{"award-number":["XDB28000000"]}]}],"content-domain":{"domain":["quantum-journal.org"],"crossmark-restriction":false},"short-container-title":["Quantum"],"abstract":"The primary objective of quantum circuit synthesis is to efficiently and accurately realize specific quantum algorithms or operations utilizing a predefined set of quantum gates, while also optimizing the circuit size. It holds a pivotal position in Noisy Intermediate-Scale Quantum (NISQ) computation. Historically, most synthesis efforts have predominantly utilized CNOT or CZ gates as the 2-qubit gates. However, the SQiSW gate, also known as the square root of iSWAP gate, has garnered considerable attention due to its outstanding experimental performance with low error rates and high efficiency in 2-qubit gate synthesis. In this paper, we investigate the potential of the SQiSW gate in various synthesis problems by utilizing only the SQiSW gate along with arbitrary single-qubit gates, while optimizing the overall circuit size. For exact synthesis, the upper bound of SQiSW gates to synthesize arbitrary 3-qubit and n<\/mml:mi><\/mml:math>-qubit gates are 24 and 139<\/mml:mn>192<\/mml:mn><\/mml:mfrac>4<\/mml:mn>n<\/mml:mi><\/mml:msup>(<\/mml:mo>1<\/mml:mn>+<\/mml:mo>o<\/mml:mi>(<\/mml:mo>1<\/mml:mn>)<\/mml:mo>)<\/mml:mo><\/mml:math> respectively, which relies on the properties of SQiSW gate in Lie theory and Quantum Shannon Decomposition. We also introduce an exact synthesis scheme for Toffoli gate using only 8 SQiSW gates, which is grounded in numerical observation. More generally, with respect to numerical approximations, we provide a theoretical analysis of a pruning algorithm to reduce the size of the searching space in numerical experiment to 1<\/mml:mn>12<\/mml:mn><\/mml:mfrac>+<\/mml:mo>o<\/mml:mi>(<\/mml:mo>1<\/mml:mn>)<\/mml:mo><\/mml:math> of previous size, helping us reach the result that 11 SQiSW gates are enough in arbitrary 3-qubit gates synthesis up to an acceptable numerical error.<\/jats:p>","DOI":"10.22331\/q-2025-10-20-1889","type":"journal-article","created":{"date-parts":[[2025,10,20]],"date-time":"2025-10-20T14:07:22Z","timestamp":1760969242000},"page":"1889","update-policy":"https:\/\/doi.org\/10.22331\/q-crossmark-policy-page","source":"Crossref","is-referenced-by-count":0,"title":["Quantum circuit synthesis with SQiSW"],"prefix":"10.22331","volume":"9","author":[{"given":"Jialiang","family":"Tang","sequence":"first","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China"},{"name":"School of Computer Science and Technology, University of Chinese Academy of Sciences, Beijing 100049, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jialin","family":"Zhang","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China"},{"name":"School of Computer Science and Technology, University of Chinese Academy of Sciences, Beijing 100049, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaoming","family":"Sun","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China"},{"name":"School of Computer Science and Technology, University of Chinese Academy of Sciences, Beijing 100049, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"9598","published-online":{"date-parts":[[2025,10,20]]},"reference":[{"key":"0","doi-asserted-by":"publisher","unstructured":"V.V. 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