{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T14:59:11Z","timestamp":1729609151051,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,3]]},"DOI":"10.23919\/date.2017.7927060","type":"proceedings-article","created":{"date-parts":[[2017,5,15]],"date-time":"2017-05-15T20:34:41Z","timestamp":1494880481000},"page":"614-617","source":"Crossref","is-referenced-by-count":1,"title":["Reconfigurable threshold logic gates using optoelectronic capacitors"],"prefix":"10.23919","author":[{"given":"Ragh","family":"Kuttappa","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lunal","family":"Khuon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bahram","family":"Nabet","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Baris","family":"Taskin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/55.386032"},{"journal-title":"A survey of nanoelectronics","year":"1994","author":"moffat","key":"ref3"},{"journal-title":"Attojoule optoelectronics for low-energy information processing and communications — a tutorial review","year":"0","author":"miller","key":"ref10"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSTQE.2014.2376701"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2016.2583673"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"633","DOI":"10.1049\/el:20020438","article-title":"compact parallel (m,n) counters based on self-timed threshold logic","volume":"38","author":"celinski","year":"2002","journal-title":"Electronics Letters"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.508261"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.26"},{"key":"ref9","first-page":"33","article-title":"CMOS capacitor coupling logic circuits","author":"huang","year":"2000","journal-title":"Proc IEEE Asia-Pacific Conf ASICs"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.816365"}],"event":{"name":"2017 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2017,3,27]]},"location":"Lausanne, Switzerland","end":{"date-parts":[[2017,3,31]]}},"container-title":["Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7919927\/7926947\/07927060.pdf?arnumber=7927060","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,24]],"date-time":"2019-09-24T17:37:26Z","timestamp":1569346646000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7927060\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,3]]},"references-count":10,"URL":"https:\/\/doi.org\/10.23919\/date.2017.7927060","relation":{},"subject":[],"published":{"date-parts":[[2017,3]]}}}