{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,18]],"date-time":"2026-01-18T22:40:31Z","timestamp":1768776031090,"version":"3.49.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.23919\/date.2018.8341984","type":"proceedings-article","created":{"date-parts":[[2018,4,23]],"date-time":"2018-04-23T19:20:11Z","timestamp":1524511211000},"page":"85-90","source":"Crossref","is-referenced-by-count":39,"title":["Cyclic locking and memristor-based obfuscation against CycSAT and inside foundry attacks"],"prefix":"10.23919","author":[{"given":"Amin","family":"Rezaei","sequence":"first","affiliation":[]},{"given":"Yuanqi","family":"Shen","sequence":"additional","affiliation":[]},{"given":"Shuyu","family":"Kong","sequence":"additional","affiliation":[]},{"given":"Jie","family":"Gu","sequence":"additional","affiliation":[]},{"given":"Hai","family":"Zhou","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-53140-2_7"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2016.7495588"},{"key":"ref12","author":"chow","year":"2007","journal-title":"Integrated Circuits Protected Against Reverse Engineering and Method for Fabricating the Same Using An Apparent Metal Contact Line Terminating on Field Oxide"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-40349-1_12"},{"key":"ref14","first-page":"145","article-title":"Design methods for polymorphic digital circuits","author":"sekanin","year":"2005","journal-title":"Proc of IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3060403.3060458"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203759"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681565"},{"key":"ref4","first-page":"1","article-title":"MRL - Memristor ratioed logic","author":"kvatinsky","year":"2012","journal-title":"International Workshop on Cellular Nanoscale Networks and Their Applications (CNNA)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.193"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297317"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516656"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2163307"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024805"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2015.7140252"}],"event":{"name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Dresden, Germany","start":{"date-parts":[[2018,3,19]]},"end":{"date-parts":[[2018,3,23]]}},"container-title":["2018 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8337149\/8341968\/08341984.pdf?arnumber=8341984","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,5,4]],"date-time":"2018-05-04T11:08:06Z","timestamp":1525432086000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8341984\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":17,"URL":"https:\/\/doi.org\/10.23919\/date.2018.8341984","relation":{},"subject":[],"published":{"date-parts":[[2018,3]]}}}