{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T09:33:57Z","timestamp":1725701637182},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.23919\/date.2018.8342041","type":"proceedings-article","created":{"date-parts":[[2018,4,23]],"date-time":"2018-04-23T23:20:11Z","timestamp":1524525611000},"page":"391-394","source":"Crossref","is-referenced-by-count":3,"title":["Ultra-low energy circuit building blocks for security technologies"],"prefix":"10.23919","author":[{"given":"Sanu","family":"Mathew","sequence":"first","affiliation":[]},{"given":"Sudhir","family":"Satpathy","sequence":"additional","affiliation":[]},{"given":"Vikram","family":"Suresh","sequence":"additional","affiliation":[]},{"given":"Ram","family":"Krishnamurthy","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"250","article-title":"A $3.07\\mu\\mathrm{m}^{2}\/\\text{bitcell}$ Physically Unclonable Function with 3.5% and 1% Bit-Instability across 0 to 80°C and 0.6 to 1.2V in a 65nm CMOS","author":"li","year":"2015","journal-title":"Symposium on VLSI Circuits Digest of Technical Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2384039"},{"key":"ref6","first-page":"239","article-title":"A 13fJ\/bit probing-resilient 250K PUF array with soft dark-bit masking for 1.94% bit-error in 22nm Tri-gate CMOS","author":"satpathy","year":"2014","journal-title":"Proc of IEEE ESSCIRC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757433"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217631"},{"key":"ref7","first-page":"116","article-title":"$\\mu\\text{RNG}$: A 300–950mV 323Gbps\/W all-digital full-entropy TRNG in 14nm FinFET CMOS","author":"mathew","year":"2015","journal-title":"Proc of IEEE ESSCIRC"},{"key":"ref2","first-page":"64","article-title":"Secure AES engine with a local switch-capacitor current equalizer","author":"tokunaga","year":"2009","journal-title":"ISSCC Digest of Technical Papers"},{"key":"ref9","first-page":"248","article-title":"A Robust-40 to 120°C All-Digital True Random Number Generator in 40nm CMOS","author":"yang","year":"2015","journal-title":"Symposium on VLSI Circuits Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108131"}],"event":{"name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2018,3,19]]},"location":"Dresden, Germany","end":{"date-parts":[[2018,3,23]]}},"container-title":["2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8337149\/8341968\/08342041.pdf?arnumber=8342041","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,5,4]],"date-time":"2018-05-04T15:11:03Z","timestamp":1525446663000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8342041\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":9,"URL":"https:\/\/doi.org\/10.23919\/date.2018.8342041","relation":{},"subject":[],"published":{"date-parts":[[2018,3]]}}}