{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T16:14:49Z","timestamp":1761581689948,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.23919\/date.2018.8342066","type":"proceedings-article","created":{"date-parts":[[2018,4,23]],"date-time":"2018-04-23T19:20:11Z","timestamp":1524511211000},"page":"539-544","source":"Crossref","is-referenced-by-count":15,"title":["HePREM: Enabling predictable GPU execution on heterogeneous SoC"],"prefix":"10.23919","author":[{"given":"Bjorn","family":"Forsberg","sequence":"first","affiliation":[]},{"given":"Luca","family":"Benini","sequence":"additional","affiliation":[]},{"given":"Andrea","family":"Marongiu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/RTEST.2015.7369851"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927008"},{"key":"ref12","article-title":"WCET-Driven Dynamic Data Scratchpad Management With Compiler-Directed Prefetching","author":"soliman","year":"2017","journal-title":"ECRTS'17"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2892208.2892209"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2017.7863738"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1142\/S0129626412500107"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/LLVM-HPC.2016.006"},{"journal-title":"Real-time Linux Wiki","year":"0","key":"ref17"},{"key":"ref4","article-title":"Memguard: Memory bandwidth reservation system for efficient performance isolation in multi-core platforms","author":"yun","year":"2013","journal-title":"Real-Time and Embedded Techn and Appl Symp (RTAS)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-015-9229-9"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2011.33"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2640961"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2013.12"},{"key":"ref7","doi-asserted-by":"crossref","DOI":"10.7873\/DATE2014.042","article-title":"Time-predictable execution of multithreaded applications on multicore systems","author":"alhammad","year":"2014","journal-title":"DATE '14"},{"key":"ref2","doi-asserted-by":"crossref","DOI":"10.1109\/TC.2016.2595581","article-title":"A globally arbitrated memory tree for mixed-time-criticality systems","volume":"66","author":"gomony","year":"2017","journal-title":"IEEE Trans on Computers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/InPar.2012.6339595"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2872362.2872368"}],"event":{"name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2018,3,19]]},"location":"Dresden, Germany","end":{"date-parts":[[2018,3,23]]}},"container-title":["2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8337149\/8341968\/08342066.pdf?arnumber=8342066","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,1]],"date-time":"2020-11-01T01:42:49Z","timestamp":1604194969000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8342066\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":17,"URL":"https:\/\/doi.org\/10.23919\/date.2018.8342066","relation":{},"subject":[],"published":{"date-parts":[[2018,3]]}}}