{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,22]],"date-time":"2025-03-22T10:38:20Z","timestamp":1742639900616},"reference-count":48,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.23919\/date.2018.8342164","type":"proceedings-article","created":{"date-parts":[[2018,4,23]],"date-time":"2018-04-23T23:20:11Z","timestamp":1524525611000},"source":"Crossref","is-referenced-by-count":12,"title":["Overview of the state of the art in embedded machine learning"],"prefix":"10.23919","author":[{"given":"Liliana","family":"Andrade","sequence":"first","affiliation":[]},{"given":"Adrien","family":"Prost-Boucle","sequence":"additional","affiliation":[]},{"given":"Frederic","family":"Petrot","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2015.7112755"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858419"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2016.7998889"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2016.2573140"},{"key":"ref30","first-page":"734","article-title":"Design implications of memristor-based RRAM cross-point structures","author":"xu","year":"2011","journal-title":"Design Automation & Test in Europe Conference & Exhibition"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838429"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-46493-0_32"},{"key":"ref35","first-page":"3123","article-title":"Binaryconnect: Training deep neural networks with binary weights during propagations","author":"courbariaux","year":"2015","journal-title":"Advances in neural information processing systems"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2017.8009177"},{"key":"ref10","first-page":"1775","article-title":"LookNN: Neural network with no multiplication","author":"razlighi","year":"2017","journal-title":"Proceedings of the 2017 IEEE\/ACM Conference on Design Automation and Test in Europe"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/2765491.2765528"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2017.7952679"},{"key":"ref12","author":"sung","year":"2015","journal-title":"Resiliency of Deep Neural Networks under Quantization"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056850"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021744"},{"key":"ref15","author":"gupta","year":"2015","journal-title":"Deep Learning with Limited Numerical Precision"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3079758"},{"key":"ref17","first-page":"238","article-title":"14.1 a 2.9 tops\/w deep convolutional neural network soc in fd-soi 28nm for intelligent embedded systems","author":"desoli","year":"2017","journal-title":"IEEE International Solid-State Circuits Conference"},{"key":"ref18","article-title":"Deep compression: Compressing deep neural network with pruning, trained quantization and huffman coding","author":"han","year":"2016","journal-title":"International Conference on Learning Representations"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001163"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2445741"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1816008"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2011.5873231"},{"key":"ref3","first-page":"1097","article-title":"Imagenet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Advances in neural information processing systems"},{"key":"ref6","author":"szegedy","year":"2016","journal-title":"Inception-v4 inception-resnet and the impact of residual connections on learning"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2017.8052950"},{"key":"ref5","author":"simonyan","year":"2014","journal-title":"Very Deep Convolutional Networks for Large-scale Image Recognition"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2474396"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2016.2573586"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1038\/nature14539"},{"key":"ref9","author":"schuman","year":"2017","journal-title":"A survey of neuromorphic computing and neural networks in hardware"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1162\/neco.2006.18.7.1527"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2013.6724691"},{"key":"ref20","author":"iandola","year":"2016","journal-title":"SqueezeNet AlexNet-level accuracy with 50x fewer parameters and"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2016.2528598"},{"key":"ref48","article-title":"Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)","author":"burr","year":"2015","journal-title":"IEEE International Electron Devices Meeting"},{"key":"ref22","first-page":"1","article-title":"A fully connected layer elimination for a binarized convolutional neural network on an FPGA","author":"nakahara","year":"2017","journal-title":"2017 27th International Conference on Field Programmable Logic and Applications (FPL)"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2439635"},{"key":"ref21","author":"springenberg","year":"2014","journal-title":"Striving for simplicity The all convolutional net"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2013.6721057"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/IWASI.2017.7974208"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2197951"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.111"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2016.2547718"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006439"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2012.6330621"},{"key":"ref25","author":"mead","year":"1989","journal-title":"Analog VLSI and Neural Systems"}],"event":{"name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Dresden, Germany","start":{"date-parts":[[2018,3,19]]},"end":{"date-parts":[[2018,3,23]]}},"container-title":["2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8337149\/8341968\/08342164.pdf?arnumber=8342164","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,5,8]],"date-time":"2018-05-08T18:25:33Z","timestamp":1525803933000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8342164\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":48,"URL":"https:\/\/doi.org\/10.23919\/date.2018.8342164","relation":{},"subject":[],"published":{"date-parts":[[2018,3]]}}}