{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,24]],"date-time":"2025-09-24T09:42:18Z","timestamp":1758706938190},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.23919\/date.2018.8342170","type":"proceedings-article","created":{"date-parts":[[2018,4,23]],"date-time":"2018-04-23T23:20:11Z","timestamp":1524525611000},"source":"Crossref","is-referenced-by-count":14,"title":["LASER: A hardware\/software approach to accelerate complicated loops on CGRAs"],"prefix":"10.23919","author":[{"given":"Mahesh","family":"Balasubramanian","sequence":"first","affiliation":[]},{"given":"Shail","family":"Dave","sequence":"additional","affiliation":[]},{"given":"Aviral","family":"Shrivastava","sequence":"additional","affiliation":[]},{"given":"Reiley","family":"Jeyapaul","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2086696.2086711"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488757"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2656075.2656085"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062262"},{"key":"ref4","article-title":"Path selection based acceleration of conditionals in cgras","author":"hari rajendran radhika","year":"2015","journal-title":"DATE"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228600"},{"key":"ref6","article-title":"Branch-aware loop mapping on cgras","author":"hamzeh","year":"2014","journal-title":"DAC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488756"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-6505-7_6"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCE.2013.6487026"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454140"},{"key":"ref1","article-title":"Designing a coarse-grained reconfigurable architecture for power efficiency","author":"carroll","year":"2007","journal-title":"DOE NA-22 University Information Technical Interchange Review Meeting"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2459316.2459319"}],"event":{"name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Dresden, Germany","start":{"date-parts":[[2018,3,19]]},"end":{"date-parts":[[2018,3,23]]}},"container-title":["2018 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8337149\/8341968\/08342170.pdf?arnumber=8342170","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,5,8]],"date-time":"2018-05-08T18:24:52Z","timestamp":1525803892000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8342170\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":14,"URL":"https:\/\/doi.org\/10.23919\/date.2018.8342170","relation":{},"subject":[],"published":{"date-parts":[[2018,3]]}}}