{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:55:14Z","timestamp":1780674914894,"version":"3.54.1"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.23919\/date.2019.8714801","type":"proceedings-article","created":{"date-parts":[[2019,5,16]],"date-time":"2019-05-16T21:29:07Z","timestamp":1558042147000},"page":"260-263","source":"Crossref","is-referenced-by-count":17,"title":["Securing Cryptographic Circuits by Exploiting Implementation Diversity and Partial Reconfiguration on FPGAs"],"prefix":"10.23919","author":[{"given":"Benjamin","family":"Hettwer","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Johannes","family":"Petersen","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Stefan","family":"Gehrer","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Heike","family":"Neumann","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tim","family":"Guneysu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","first-page":"63","article-title":"Survey of methods to improve side-channel resistance on partial reconfigurable platforms","author":"st\u00f6ttinger","year":"2011","journal-title":"Design Methodologies for Secure Embedded Systems"},{"key":"ref11","article-title":"Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit","year":"0"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-37119-6_22"},{"key":"ref13","author":"mangard","year":"2007","journal-title":"Power Analysis Attacks Revealing the Secrets of Smart Cards (Advances in Information Security)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/11889700_13"},{"key":"ref4","first-page":"257","author":"regazzoni","year":"2012","journal-title":"Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-29656-7"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RECONFIG.2017.8279780"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-85053-3_22"},{"key":"ref8","article-title":"Partial Reconfiguration Controller","year":"0"},{"key":"ref7","article-title":"AR# 63419: Vivado Partial Reconfiguration - What types of bitstreams are used in Partial Reconfiguration (PR) solutions?","year":"0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44709-1_21"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_2"},{"key":"ref9","article-title":"Vivado Design Suite User Guide-Implementation","year":"0"}],"event":{"name":"2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Florence, Italy","start":{"date-parts":[[2019,3,25]]},"end":{"date-parts":[[2019,3,29]]}},"container-title":["2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8704855\/8714721\/08714801.pdf?arnumber=8714801","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,3]],"date-time":"2019-06-03T23:49:38Z","timestamp":1559605778000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8714801\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":14,"URL":"https:\/\/doi.org\/10.23919\/date.2019.8714801","relation":{},"subject":[],"published":{"date-parts":[[2019,3]]}}}