{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T23:10:22Z","timestamp":1767827422972,"version":"3.49.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.23919\/date.2019.8715034","type":"proceedings-article","created":{"date-parts":[[2019,5,16]],"date-time":"2019-05-16T21:29:07Z","timestamp":1558042147000},"page":"716-721","source":"Crossref","is-referenced-by-count":9,"title":["FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors"],"prefix":"10.23919","author":[{"given":"Mehdi","family":"Alipour","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rakesh","family":"Kumar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stefanos","family":"Kaxiras","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Black-Schaffer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105405"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003560"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991119"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830815"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750407"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3075564.3075581"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"ref6","article-title":"Intel R64 and ia-32 architectures optimization reference manual","author":"corporation","year":"2016"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2581122.2544161"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2370816.2370865"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.35"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540713"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/384286.264201"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1186736.1186737"}],"event":{"name":"2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Florence, Italy","start":{"date-parts":[[2019,3,25]]},"end":{"date-parts":[[2019,3,29]]}},"container-title":["2019 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8704855\/8714721\/08715034.pdf?arnumber=8715034","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,3]],"date-time":"2019-06-03T23:49:49Z","timestamp":1559605789000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8715034\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":14,"URL":"https:\/\/doi.org\/10.23919\/date.2019.8715034","relation":{},"subject":[],"published":{"date-parts":[[2019,3]]}}}