{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T15:40:44Z","timestamp":1781797244127,"version":"3.54.5"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.23919\/date.2019.8715272","type":"proceedings-article","created":{"date-parts":[[2019,5,16]],"date-time":"2019-05-16T17:29:07Z","timestamp":1558027747000},"page":"1106-1111","source":"Crossref","is-referenced-by-count":12,"title":["Towards Design Space Exploration and Optimization of Fast Algorithms for Convolutional Neural Networks (CNNs) on FPGAs"],"prefix":"10.23919","author":[{"given":"Afzal","family":"Ahmad","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Muhammad Adeel","family":"Pasha","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","first-page":"1","article-title":"A high performance FPGA-based accelerator for large-scale convolutional neural networks","author":"li","year":"2016","journal-title":"International Conference on Field Programmable Logic and Applications (FPL)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2017.7995253"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-11179-7_36"},{"key":"ref6","article-title":"Fast convolutional nets with fbfft: A GPU performance evaluation","volume":"abs 1412 7580","author":"vasilache","year":"2014","journal-title":"CoRR"},{"key":"ref11","article-title":"Fast algorithms for convolutional neural networks","volume":"abs 1509 9308","author":"lavin","year":"2015","journal-title":"CoRR"},{"key":"ref5","first-page":"1393","article-title":"Efficient FPGA Acceleration of Convolutional Neural Networks Using Logical-3D Compute Array","author":"atul rahman","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref8","article-title":"Very deep convolutional networks for large-scale image recognition","volume":"abs 1409 1556","author":"simonyan","year":"2014","journal-title":"CoRR"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3065386"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1137\/1.9781611970364"},{"key":"ref1","first-page":"82","article-title":"Accelerating large-scale con-volutional neural networks with parallel graphics multiprocessors","author":"scherer","year":"2010","journal-title":"Int Conf Artificial Neural Networks (ICANN)"}],"event":{"name":"2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Florence, Italy","start":{"date-parts":[[2019,3,25]]},"end":{"date-parts":[[2019,3,29]]}},"container-title":["2019 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8704855\/8714721\/08715272.pdf?arnumber=8715272","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,3]],"date-time":"2019-06-03T19:50:00Z","timestamp":1559591400000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8715272\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":12,"URL":"https:\/\/doi.org\/10.23919\/date.2019.8715272","relation":{},"subject":[],"published":{"date-parts":[[2019,3]]}}}