{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,30]],"date-time":"2026-01-30T19:43:05Z","timestamp":1769802185637,"version":"3.49.0"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,3]]},"DOI":"10.23919\/date48585.2020.9116215","type":"proceedings-article","created":{"date-parts":[[2020,6,15]],"date-time":"2020-06-15T19:28:37Z","timestamp":1592249317000},"page":"1025-1030","source":"Crossref","is-referenced-by-count":9,"title":["Overcoming Challenges for Achieving High in-situ Training Accuracy with Emerging Memories"],"prefix":"10.23919","author":[{"given":"Shanshi","family":"Huang","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"}]},{"given":"Xiaoyu","family":"Sun","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"}]},{"given":"Xiaochen","family":"Peng","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"}]},{"given":"Hongwu","family":"Jiang","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"}]},{"given":"Shimeng","family":"Yu","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614611"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268337"},{"key":"ref12","article-title":"Training and inference with integers in deep neural networks","author":"wu","year":"0"},{"key":"ref13","article-title":"Scalable methods for 8-bit training of neural networks","author":"banner","year":"2018","journal-title":"Advances in Neural Information Processing Systems (NIPS)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2933148"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1038\/s41563-017-0001-5"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2019.2934050"},{"key":"ref17","article-title":"XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks","author":"sun","year":"2018","journal-title":"IEEE Design Automation and Test European (DATE) Conf"},{"key":"ref4","article-title":"Confined PCM-based analog synaptic devices offering low resistance-drift and 1000 programmable states for deep learning","author":"kim","year":"2018","journal-title":"IEEE Symp VLSI Technol"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510690"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614551"},{"key":"ref5","doi-asserted-by":"crossref","DOI":"10.1109\/IEDM.2017.8268338","article-title":"Ferroelectric FET analog synapse for acceleration of deep neural network training","author":"jerry","year":"2017","journal-title":"IEEE International Electron Devices Meeting (IEDM)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2016.7727298"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2015.7409625"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310401"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"260","DOI":"10.1109\/JPROC.2018.2790840","article-title":"Neuro-inspired computing with emerging non-volatile memory","volume":"106","author":"yu","year":"0","journal-title":"Proc IEEE"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-018-0180-5"}],"event":{"name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Grenoble, France","start":{"date-parts":[[2020,3,9]]},"end":{"date-parts":[[2020,3,13]]}},"container-title":["2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9112295\/9116186\/09116215.pdf?arnumber=9116215","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,2]],"date-time":"2022-08-02T19:47:49Z","timestamp":1659469669000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9116215\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,3]]},"references-count":17,"URL":"https:\/\/doi.org\/10.23919\/date48585.2020.9116215","relation":{},"subject":[],"published":{"date-parts":[[2020,3]]}}}