{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T00:35:03Z","timestamp":1725669303404},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,3]]},"DOI":"10.23919\/date48585.2020.9116224","type":"proceedings-article","created":{"date-parts":[[2020,6,15]],"date-time":"2020-06-15T19:28:37Z","timestamp":1592249317000},"page":"598-603","source":"Crossref","is-referenced-by-count":1,"title":["Accuracy Analysis for Stochastic Circuits with D Flip-Flop Insertion"],"prefix":"10.23919","author":[{"given":"Kuncai","family":"Zhong","sequence":"first","affiliation":[{"name":"University of Michigan-Shanghai Jiao Tong University Joint Institute"}]},{"given":"Weikang","family":"Qian","sequence":"additional","affiliation":[{"name":"University of Michigan-Shanghai Jiao Tong University Joint Institute"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2014.6974707"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.202"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2432138"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2016.2618750"},{"article-title":"ABC: a system for sequential synthesis and verification, release 80916","year":"0","author":"mishchenko","key":"ref14"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037746"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2016.2608825"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/29.1564"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203837"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2846660"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2018.00037"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488901"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4899-5841-9_2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3183345"}],"event":{"name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2020,3,9]]},"location":"Grenoble, France","end":{"date-parts":[[2020,3,13]]}},"container-title":["2020 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9112295\/9116186\/09116224.pdf?arnumber=9116224","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,2]],"date-time":"2022-08-02T19:47:57Z","timestamp":1659469677000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9116224\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,3]]},"references-count":14,"URL":"https:\/\/doi.org\/10.23919\/date48585.2020.9116224","relation":{},"subject":[],"published":{"date-parts":[[2020,3]]}}}