{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T10:13:08Z","timestamp":1767262388726},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,3]]},"DOI":"10.23919\/date48585.2020.9116460","type":"proceedings-article","created":{"date-parts":[[2020,6,15]],"date-time":"2020-06-15T23:28:37Z","timestamp":1592263717000},"page":"330-333","source":"Crossref","is-referenced-by-count":7,"title":["Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core Systems"],"prefix":"10.23919","author":[{"given":"Maximilien","family":"Dupont de Dinechin","sequence":"first","affiliation":[]},{"given":"Matheus","family":"Schuh","sequence":"additional","affiliation":[]},{"given":"Matthieu","family":"Moy","sequence":"additional","affiliation":[]},{"given":"Claire","family":"Maiza","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"article-title":"Scaling up the memory interference analysis for hard real-time many-core systems (full version)","year":"2019","author":"de dinechin","key":"ref4"},{"key":"ref3","first-page":"1","article-title":"Time-critical computing on a single-chip massively parallel processor","author":"de dinechin","year":"2014","journal-title":"DATE"},{"key":"ref6","article-title":"Many-Core Timing Analysis of Real-Time Systems","author":"rihani","year":"2017","journal-title":"These"},{"key":"ref5","article-title":"Code Generation for Multi-Core Processor with Hard Real-Time Constraints","author":"graillat","year":"2018","journal-title":"These"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1002\/jos.116"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2997465.2997472"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-16256-5_6"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2834848.2834862"}],"event":{"name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2020,3,9]]},"location":"Grenoble, France","end":{"date-parts":[[2020,3,13]]}},"container-title":["2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9112295\/9116186\/09116460.pdf?arnumber=9116460","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,7,13]],"date-time":"2020-07-13T22:42:34Z","timestamp":1594680154000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9116460\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,3]]},"references-count":8,"URL":"https:\/\/doi.org\/10.23919\/date48585.2020.9116460","relation":{},"subject":[],"published":{"date-parts":[[2020,3]]}}}