{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,31]],"date-time":"2024-10-31T02:51:12Z","timestamp":1730343072309,"version":"3.28.0"},"reference-count":58,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,3]]},"DOI":"10.23919\/date48585.2020.9116558","type":"proceedings-article","created":{"date-parts":[[2020,6,15]],"date-time":"2020-06-15T19:28:37Z","timestamp":1592249317000},"page":"388-393","source":"Crossref","is-referenced-by-count":0,"title":["RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems"],"prefix":"10.23919","author":[{"given":"M.","family":"Jenihhin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Hamdioui","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M. Sonza","family":"Reorda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Krstic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Langendorfer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C.","family":"Sauer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Klotz","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Huebner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Nolte","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H. T.","family":"Vierhaus","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Selimis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Alexandrescu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Taouil","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G. J.","family":"Schrijen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Raik","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Sterpone","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Squillero","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Z.","family":"Dyka","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS46596.2019.8964644"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2019.00080"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2019.8724642"},{"key":"ref32","article-title":"RESCUE EDA Toolset for Interdependent Aspects of Reliability, Security and Quality in Nanoelectronic Systems Design","author":"g\u00fcrsoy","year":"2019","journal-title":"University Booth at Design Automation & Test in Europe Conference & Exhibition (DATE UB)"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2019.8854423"},{"key":"ref30","doi-asserted-by":"crossref","DOI":"10.1142\/S0218126619400073","article-title":"New techniques for reducing the duration of Reconfigurable Scan Network test","volume":"28","author":"cantoro","year":"2019","journal-title":"Journal of Circuits Systems and Computers"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2019.8875379"},{"key":"ref36","first-page":"1","article-title":"On NBTI- induced Aging Analysis in IEÉE 1687 Reconfigurable Scan Networks","author":"damljanovic","year":"0","journal-title":"VLSI-SoC 2019"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2019.102867"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2019.8854458"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2019.8791526"},{"key":"ref27","article-title":"DFT Scheme for Hard-to-Detect Faultsin FinFET SRAMs","author":"medeiros","year":"0","journal-title":"Test Symposium (ETS) 2019 24th IEEE European"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2019.8791546"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2017.2745799"},{"year":"0","key":"ref1"},{"key":"ref20","article-title":"Improving the Confidence Level in Functional Safety Simulation Tools for ISO 26262","author":"bagbaba","year":"2018","journal-title":"2018 Design and Verification Conference and Exhibition (DVCon) Europe"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/EWME.2018.8629465"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/NORCHIP.2018.8573495"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2019.8704595"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2019.8704591"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116278"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2019.8704643"},{"key":"ref50","article-title":"Efficient Methodology for IS026262 Functional Safety Verification","author":"augusto da silva","year":"2019","journal-title":"IEEE IOLTS"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/NORCHIP.2019.8906932"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/NORCHIP.2019.8906974"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2019.8854423"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2019.00007"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/DSN-S.2019.00021"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/DTIS.2019.8735052"},{"key":"ref53","article-title":"Configurable Fault Tolerant Circuits and System Level Integration for Self-Awareness","author":"segabinazzi ferreira","year":"2019","journal-title":"2019 22nd Euromicro Conference on Digital System Design (DSD) (Work in Progress Session)"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2019.8704560"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2018.07.092"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2018.8474174"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/DTIS.2019.8735047"},{"key":"ref12","article-title":"Single Event Characterization of a Xilinx UltraScale+ MP-SoC FPGA","author":"lange","year":"0","journal-title":"2018 ESA\/ESTEC Space FPGA Users Workshop (SEFUW’18)"},{"key":"ref13","first-page":"120","article-title":"A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs","author":"sterpone","year":"2018","journal-title":"2018 NASA\/ESA AHS 2018"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/NSREC.2018.8584296"},{"key":"ref15","first-page":"55","article-title":"A SemiFormal Technique to Generate Effective Test Sequences for Reconfigurable Scan Networks","author":"cantora","year":"2018","journal-title":"IEEE ITC-Asia"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2018.8624742"},{"key":"ref17","article-title":"Comparing different approaches to the test of Reconfigurable Scan Networks","author":"cantoro","year":"0","journal-title":"2018 3rd Int Test Standards Application Workshop (TESTA)"},{"journal-title":"Fault Injections Most Often Used Setups","year":"2018","author":"petryk","key":"ref18"},{"key":"ref19","article-title":"Use of Formal Methods for verification and optimization of Fault Lists in the scope of IS026262","author":"augusto da silva","year":"2018","journal-title":"2018 Design and Verification Conference and Exhibition (DVCon) Europe"},{"key":"ref4","first-page":"343","article-title":"Runtime Adaptive Cache for the LEON3 Processor","author":"guzman","year":"2018","journal-title":"ARCS 2018"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2017.2735383"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14452-3_1"},{"key":"ref5","first-page":"171","article-title":"A scalable model based RTL framework zamiaCAD for static analysis","author":"t\u0161epurov","year":"2012","journal-title":"IEEE\/IFIP VLSI-SoC"},{"year":"0","key":"ref8","article-title":"BELAS: Biannual European - Latin American Summer School on Design, Test and Reliability"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2016.57"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2019.8854419"},{"year":"0","key":"ref9","article-title":"RESCUE research results (2018-2019):"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS46596.2019.8964677"},{"key":"ref45","article-title":"A Novel Sequence Generation Approach to Diagnose Faults in Reconfigurable Scan Networks","author":"cantoro","year":"2019","journal-title":"IEEE Transaction on Computers"},{"key":"ref48","article-title":"Combining Fault Analysis Tools for IS026262 Functional Safety Verification","author":"augusto da silva","year":"2019","journal-title":"Proceedings IEEE Asian Test Symposium (ATS)"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ITC44170.2019.9000181"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2019.8854463"},{"key":"ref41","article-title":"On the in-field test of the GPGPU scheduler memory","author":"stefano","year":"2019","journal-title":"IEEE DDECS"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126619400073"},{"key":"ref43","article-title":"An open source embedded-GPGPU model for the accurate analysis and mitigation of SEU effects","author":"du","year":"2019","journal-title":"30th RADECS"}],"event":{"name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2020,3,9]]},"location":"Grenoble, France","end":{"date-parts":[[2020,3,13]]}},"container-title":["2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9112295\/9116186\/09116558.pdf?arnumber=9116558","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,7,13]],"date-time":"2020-07-13T18:42:51Z","timestamp":1594665771000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9116558\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,3]]},"references-count":58,"URL":"https:\/\/doi.org\/10.23919\/date48585.2020.9116558","relation":{},"subject":[],"published":{"date-parts":[[2020,3]]}}}