{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,7]],"date-time":"2026-05-07T15:36:13Z","timestamp":1778168173330,"version":"3.51.4"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,2,1]]},"DOI":"10.23919\/date51398.2021.9473959","type":"proceedings-article","created":{"date-parts":[[2021,8,24]],"date-time":"2021-08-24T22:11:46Z","timestamp":1629843106000},"page":"1821-1824","source":"Crossref","is-referenced-by-count":48,"title":["Global Placement with Deep Learning-Enabled Explicit Routability Optimization"],"prefix":"10.23919","author":[{"given":"Siting","family":"Liu","sequence":"first","affiliation":[]},{"given":"Qi","family":"Sun","sequence":"additional","affiliation":[]},{"given":"Peiyu","family":"Liao","sequence":"additional","affiliation":[]},{"given":"Yibo","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Bei","family":"Yu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240843"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317876"},{"key":"ref12","article-title":"DREAM-Place: Deep learning toolkit-enabled GPU acceleration for modern VLSI placement","author":"lin","year":"0","journal-title":"Proc DAC"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364463"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3372780.3375560"},{"key":"ref15","author":"kingma","year":"2014","journal-title":"Adam A method for stochastic optimization"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2723572"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045178"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2170567"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1055137.1055188"},{"key":"ref6","article-title":"NTUplace4dr: a detailed-routing-driven placer for mixed-size circuit designs with technology and region constraints","author":"huang","year":"2017","journal-title":"IEEE TCAD"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2699873"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105307"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2859220"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.825868"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429441"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488922"}],"event":{"name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Grenoble, France","start":{"date-parts":[[2021,2,1]]},"end":{"date-parts":[[2021,2,5]]}},"container-title":["2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9473901\/9473226\/09473959.pdf?arnumber=9473959","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,28]],"date-time":"2022-01-28T22:32:42Z","timestamp":1643409162000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9473959\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,2,1]]},"references-count":17,"URL":"https:\/\/doi.org\/10.23919\/date51398.2021.9473959","relation":{},"subject":[],"published":{"date-parts":[[2021,2,1]]}}}