{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,24]],"date-time":"2025-08-24T01:16:18Z","timestamp":1755998178334,"version":"3.37.3"},"reference-count":21,"publisher":"IEEE","funder":[{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["SHF-1745748,SHF-1618536"],"award-info":[{"award-number":["SHF-1745748,SHF-1618536"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,2,1]]},"DOI":"10.23919\/date51398.2021.9474136","type":"proceedings-article","created":{"date-parts":[[2021,8,24]],"date-time":"2021-08-24T22:11:46Z","timestamp":1629843106000},"page":"507-512","source":"Crossref","is-referenced-by-count":4,"title":["Efficient Hardware-assisted Out-place Update for Persistent Memory"],"prefix":"10.23919","author":[{"given":"Yifu","family":"Deng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jianhui","family":"Yue","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhiyuan","family":"Lu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yifeng","family":"Zhu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"507","article-title":"PiCL: A software-transparent, persistent cache log for nonvolatile main memory","author":"nguyen","year":"2018","journal-title":"Micro"},{"year":"0","author":"mulnixl","journal-title":"Intel Xeon Processor D product family technical overview","key":"ref11"},{"key":"ref12","first-page":"169","article-title":"An empirical guide to the behavior and use of scalable persistent memory","author":"yang","year":"2020","journal-title":"FAST"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1145\/362686.362692"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/HPCA.2018.00035"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1145\/3307650.3322206"},{"year":"0","journal-title":"ChampSim","key":"ref16"},{"year":"0","journal-title":"DRAMSim2","key":"ref17"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1145\/1065010.1065034"},{"key":"ref19","article-title":"manner Vilho Raatikka Simo Neuvonen","author":"markku","year":"0","journal-title":"TATP telecommunication application transaction processing (benchmark description)"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1145\/3079856.3080240"},{"key":"ref3","first-page":"178","article-title":"Proteus: A flexible and fast software supported hardware logging approach for NVM","author":"shin","year":"2017","journal-title":"Micro"},{"key":"ref6","article-title":"Improving the performance of nvm crash consistency under multicore","author":"lu","year":"0","journal-title":"The 38th IEEE International Conference on Computer Design(ICCD)"},{"key":"ref5","first-page":"520","article-title":"Efficient hardware-assisted logging with asynchronous and direct-update for persistent memory","author":"jeong","year":"2018","journal-title":"Micro"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1145\/1629575.1629589"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1145\/320455.320457"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/HPCA.2016.7446055"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/HPCA.2017.50"},{"key":"ref9","article-title":"SSP: Eliminating redundant writes in failure-atomic NVRAMs via shadow sub-paging","author":"ni","year":"2019","journal-title":"Micro"},{"year":"0","journal-title":"TPC-C","article-title":"Transaction processing performance council (TPC)","key":"ref20"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.23919\/DATE48585.2020.9116523"}],"event":{"name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2021,2,1]]},"location":"Grenoble, France","end":{"date-parts":[[2021,2,5]]}},"container-title":["2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9473901\/9473226\/09474136.pdf?arnumber=9474136","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,29]],"date-time":"2022-01-29T00:29:21Z","timestamp":1643416161000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9474136\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,2,1]]},"references-count":21,"URL":"https:\/\/doi.org\/10.23919\/date51398.2021.9474136","relation":{},"subject":[],"published":{"date-parts":[[2021,2,1]]}}}