{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T15:25:38Z","timestamp":1773761138828,"version":"3.50.1"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,2,1]]},"DOI":"10.23919\/date51398.2021.9474213","type":"proceedings-article","created":{"date-parts":[[2021,8,24]],"date-time":"2021-08-24T22:11:46Z","timestamp":1629843106000},"page":"1218-1223","source":"Crossref","is-referenced-by-count":7,"title":["Performance-driven Routing Methodology with Incremental Placement Refinement for Analog Layout Design"],"prefix":"10.23919","author":[{"given":"Hao-Yu","family":"Chi","sequence":"first","affiliation":[]},{"given":"Han-Chung","family":"Chang","sequence":"additional","affiliation":[]},{"given":"Chih-Hsin","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Chien-Nan","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Jing-Yang","family":"Jou","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.907068"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2160916.2160934"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3131849"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/343647.343713"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2004.1329529"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.378437"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/43.552084"},{"key":"ref17","article-title":"Achieving Routing Integrity in Analog Layout Migration via Cartesian Detection Lines","author":"chi","year":"0","journal-title":"IEEE\/ACM International Conference on Computer-Aided Design"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2214389"},{"key":"ref19","year":"0"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2501293"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2305831"},{"key":"ref6","volume":"25","author":"chi","year":"2020","journal-title":"Wire Load Oriented Analog Routing with Matching Constraints"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2975177"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2279516"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228458"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2064490"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2017433"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2839698"}],"event":{"name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Grenoble, France","start":{"date-parts":[[2021,2,1]]},"end":{"date-parts":[[2021,2,5]]}},"container-title":["2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9473901\/9473226\/09474213.pdf?arnumber=9474213","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,28]],"date-time":"2022-01-28T20:49:16Z","timestamp":1643402956000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9474213\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,2,1]]},"references-count":19,"URL":"https:\/\/doi.org\/10.23919\/date51398.2021.9474213","relation":{},"subject":[],"published":{"date-parts":[[2021,2,1]]}}}