{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,2]],"date-time":"2026-06-02T23:36:16Z","timestamp":1780443376996,"version":"3.54.1"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,2,1]]},"DOI":"10.23919\/date51398.2021.9474244","type":"proceedings-article","created":{"date-parts":[[2021,8,10]],"date-time":"2021-08-10T20:30:23Z","timestamp":1628627423000},"page":"1224-1229","source":"Crossref","is-referenced-by-count":28,"title":["Common-Centroid Layouts for Analog Circuits: Advantages and Limitations"],"prefix":"10.23919","author":[{"given":"Arvind K.","family":"Sharma","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Meghna","family":"Madhusudan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Steven M.","family":"Burns","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Parijat","family":"Mukherjee","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Soner","family":"Yaldiz","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ramesh","family":"Harjani","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sachin S.","family":"Sapatnekar","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","author":"m\u00fcler","year":"2020","journal-title":"GeoStat-Framework\/GSTools"},{"key":"ref11","first-page":"245","article-title":"A scaleable model for STI mechanical stress effect on layout dependence of MOS electrical characteristics","author":"su","year":"0","journal-title":"Proc CICC"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320869"},{"key":"ref13","author":"razavi","year":"2016","journal-title":"Design of Analog CMOS Integrated Circuits"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2015.7223657"},{"key":"ref15","first-page":"93","article-title":"Managing process variation in Intel's 45nm CMOS technology","volume":"12","author":"kuhn","year":"2008","journal-title":"Intel Technol J"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3323471"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.862342"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.848021"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2015.2418155"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1123008.1123011"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/43.998626"},{"key":"ref6","author":"pang","year":"2008","journal-title":"Measurement and Analysis of Variability in Cmos Circuits"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.859469"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2005.82"},{"key":"ref2","article-title":"Analog\/mixed-signal design challenges in 7-nm CMOS and beyond","author":"loke","year":"0","journal-title":"Proc CICC"},{"key":"ref1","author":"hastings","year":"2001","journal-title":"The Art of Analog Layout"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.1002\/9781119115151","author":"cressie","year":"1993","journal-title":"Statistics for Spatial Data"}],"event":{"name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Grenoble, France","start":{"date-parts":[[2021,2,1]]},"end":{"date-parts":[[2021,2,5]]}},"container-title":["2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9473901\/9473226\/09474244.pdf?arnumber=9474244","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,11,7]],"date-time":"2023-11-07T00:55:44Z","timestamp":1699318544000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9474244\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,2,1]]},"references-count":19,"URL":"https:\/\/doi.org\/10.23919\/date51398.2021.9474244","relation":{},"subject":[],"published":{"date-parts":[[2021,2,1]]}}}