{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,20]],"date-time":"2026-06-20T16:19:40Z","timestamp":1781972380917,"version":"3.54.5"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,3,14]],"date-time":"2022-03-14T00:00:00Z","timestamp":1647216000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,3,14]],"date-time":"2022-03-14T00:00:00Z","timestamp":1647216000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,3,14]]},"DOI":"10.23919\/date54114.2022.9774572","type":"proceedings-article","created":{"date-parts":[[2022,5,19]],"date-time":"2022-05-19T20:35:05Z","timestamp":1652992505000},"page":"1173-1176","source":"Crossref","is-referenced-by-count":16,"title":["Eva-CAM: A Circuit\/Architecture-Level Evaluation Tool for General Content Addressable Memories"],"prefix":"10.23919","author":[{"given":"Liu","family":"Liu","sequence":"first","affiliation":[{"name":"University of Notre Dame,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mohammad Mehdi","family":"Sharifi","sequence":"additional","affiliation":[{"name":"University of Notre Dame,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ramin","family":"Rajaei","sequence":"additional","affiliation":[{"name":"University of Notre Dame,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Arman","family":"Kazemi","sequence":"additional","affiliation":[{"name":"University of Notre Dame,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kai","family":"Ni","sequence":"additional","affiliation":[{"name":"Rochester Institute of Technology,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xunzhao","family":"Yin","sequence":"additional","affiliation":[{"name":"Zhejiang University,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michael","family":"Niemier","sequence":"additional","affiliation":[{"name":"University of Notre Dame,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaobo Sharon","family":"Hu","sequence":"additional","affiliation":[{"name":"University of Notre Dame,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2889225"},{"key":"ref3","first-page":"896","article-title":"1 Mb 0.41?m2 2T-2R Cell Nonvolatile TCAM With Two-Bit Encoding and Clocked Self-Referenced Sensing","volume":"49","author":"li","year":"2014","journal-title":"ISSC"},{"key":"ref10","first-page":"994","article-title":"Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile memory","volume":"31","author":"dong","year":"2012","journal-title":"TCAD"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-020-15254-4"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967059"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474025"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510622"},{"key":"ref8","first-page":"1","article-title":"A Flash-Based Multi-Bit Content-Addressable Mem-ory with Euclidean Squared Distance","author":"kazemi","year":"2021","journal-title":"ISLPED"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2994896"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2021.3110464"},{"key":"ref9","first-page":"44","article-title":"A 3.14 um2 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture","author":"matsunaga","year":"2012","journal-title":"VLSIC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0321-3"}],"event":{"name":"2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Antwerp, Belgium","start":{"date-parts":[[2022,3,14]]},"end":{"date-parts":[[2022,3,23]]}},"container-title":["2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9774496\/9774497\/09774572.pdf?arnumber=9774572","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T20:49:28Z","timestamp":1658177368000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9774572\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,3,14]]},"references-count":12,"URL":"https:\/\/doi.org\/10.23919\/date54114.2022.9774572","relation":{},"subject":[],"published":{"date-parts":[[2022,3,14]]}}}