{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,5]],"date-time":"2026-08-05T03:30:46Z","timestamp":1785900646439,"version":"3.56.0"},"reference-count":20,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,3,14]],"date-time":"2022-03-14T00:00:00Z","timestamp":1647216000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,3,14]],"date-time":"2022-03-14T00:00:00Z","timestamp":1647216000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,3,14]]},"DOI":"10.23919\/date54114.2022.9774682","type":"proceedings-article","created":{"date-parts":[[2022,5,19]],"date-time":"2022-05-19T20:35:05Z","timestamp":1652992505000},"page":"1341-1346","source":"Crossref","is-referenced-by-count":25,"title":["PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs"],"prefix":"10.23919","author":[{"given":"Zhe","family":"Lin","sequence":"first","affiliation":[{"name":"Peng Cheng Laboratory,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zike","family":"Yuan","sequence":"additional","affiliation":[{"name":"The University of Auckland,New Zealand"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jieru","family":"Zhao","sequence":"additional","affiliation":[{"name":"Shanghai Jiao Tong University,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Wei","family":"Zhang","sequence":"additional","affiliation":[{"name":"The Hong Kong University of Science and Technology,Hong Kong, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hui","family":"Wang","sequence":"additional","affiliation":[{"name":"Peng Cheng Laboratory,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yonghong","family":"Tian","sequence":"additional","affiliation":[{"name":"Peng Cheng Laboratory,China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Vivado design suite tutorial: Power Analysis and Optimization","year":"2019","journal-title":"Xilinx White Paper"},{"key":"ref11","article-title":"UltraScale Architecture Low Power Technology Overview","author":"kolluri","year":"2015","journal-title":"Xilinx White Paper"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415657"},{"key":"ref13","article-title":"Semi-supervised classification with graph convolutional networks","author":"kipf","year":"0","journal-title":"Proc of ICLR"},{"key":"ref14","article-title":"Inductive representation learning on large graphs","author":"hamilton","year":"0","journal-title":"Proc of NeurIPS"},{"key":"ref15","article-title":"Strategies for pretraining graph neural networks","author":"hu","year":"0","journal-title":"Proc of ICLR"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v33i01.33014602"},{"key":"ref17","article-title":"Fast graph representation learning with PyTorch Geometric","author":"fey","year":"0","journal-title":"ICLR Workshop"},{"key":"ref18","article-title":"Scikit-learn: Machine learning in Python","author":"pedregosa","year":"2011","journal-title":"Journal of Machine Learning Research"},{"key":"ref19","author":"pouchet","year":"2012","journal-title":"PolyBench The Polyhedral Benchmark Suite"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218643"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317884"},{"key":"ref6","article-title":"Dynamic power and performance back-annotation for fast and accurate functional hardware simulation","author":"lee","year":"0","journal-title":"Proc of DATE"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372592"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.69"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045442"},{"key":"ref2","article-title":"An ensemble learning approach for in-situ monitoring of FPGA dynamic power","author":"lin","year":"2018","journal-title":"TCAD"},{"key":"ref1","article-title":"Power consumption estimation in CMOS VLSI chips","author":"liu","year":"1994","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2002.1167521"},{"key":"ref20","year":"2018","journal-title":"Zynq UltraScale+ MPSoC Power Advantage Tool 2018 1"}],"event":{"name":"2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Antwerp, Belgium","start":{"date-parts":[[2022,3,14]]},"end":{"date-parts":[[2022,3,23]]}},"container-title":["2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9774496\/9774497\/09774682.pdf?arnumber=9774682","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,30]],"date-time":"2025-05-30T17:45:22Z","timestamp":1748627122000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9774682\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,3,14]]},"references-count":20,"URL":"https:\/\/doi.org\/10.23919\/date54114.2022.9774682","relation":{},"subject":[],"published":{"date-parts":[[2022,3,14]]}}}