{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:37:45Z","timestamp":1740101865646,"version":"3.37.3"},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61821003,61832007"],"award-info":[{"award-number":["61821003,61832007"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,4]]},"DOI":"10.23919\/date56975.2023.10137177","type":"proceedings-article","created":{"date-parts":[[2023,6,2]],"date-time":"2023-06-02T19:32:57Z","timestamp":1685734377000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["AGDM: An Adaptive Granularity Data Migration Strategy for Hybrid Memory Systems"],"prefix":"10.23919","author":[{"given":"Zhouxuan","family":"Peng","sequence":"first","affiliation":[{"name":"School of Computer Science & Technology, Huazhong University of Science & Technology,Wuhan National Laboratory for Optoelectronics, Key Laboratory of Information Storage System of MoE,Wuhan,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dan","family":"Feng","sequence":"additional","affiliation":[{"name":"School of Computer Science & Technology, Huazhong University of Science & Technology,Wuhan National Laboratory for Optoelectronics, Key Laboratory of Information Storage System of MoE,Wuhan,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jianxi","family":"Chen","sequence":"additional","affiliation":[{"name":"School of Computer Science & Technology, Huazhong University of Science & Technology,Wuhan National Laboratory for Optoelectronics, Key Laboratory of Information Storage System of MoE,Wuhan,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jing","family":"Hu","sequence":"additional","affiliation":[{"name":"School of Computer Science & Technology, Huazhong University of Science & Technology,Wuhan National Laboratory for Optoelectronics, Key Laboratory of Information Storage System of MoE,Wuhan,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chuang","family":"Huang","sequence":"additional","affiliation":[{"name":"School of Computer Science & Technology, Huazhong University of Science & Technology,Wuhan National Laboratory for Optoelectronics, Key Laboratory of Information Storage System of MoE,Wuhan,China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","first-page":"1","article-title":"SPEC CPU2006 benchmark descriptions","volume":"34 4","author":"john","year":"2006","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749716"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"ref14","article-title":"Improving performance via mini-applications","author":"michael","year":"2009","journal-title":"No SAND2009-5574"},{"key":"ref11","first-page":"1","article-title":"The gem5 simulator","volume":"39 2","author":"nathan","year":"2011","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2004.10010"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242474"},{"journal-title":"JESD235","article-title":"High bandwidth memory (hbm) dram","year":"2013","key":"ref1"},{"key":"ref16","article-title":"XSBench-the development and verification of a performance abstraction for Monte Carlo reactor analysis","author":"tramm","year":"2014","journal-title":"The Role of Reactor Physics toward a Sustainable Future (PHYSOR)"},{"key":"ref8","first-page":"1","article-title":"CAMEO: A Two-Level Memory Organization with Capacity of Main Memory and Flexibility of Hardware-Managed Cache","author":"chou","year":"2014","journal-title":"Micro"},{"key":"ref7","first-page":"13","article-title":"Transparent Hardware Management of Stacked DRAM as Part of Memory","author":"sim","year":"2014","journal-title":"Micro"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTER.2017.130"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2731776"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.2200\/S00381ED1V01Y201109CAC018"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00059"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.20"}],"event":{"name":"2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)","start":{"date-parts":[[2023,4,17]]},"location":"Antwerp, Belgium","end":{"date-parts":[[2023,4,19]]}},"container-title":["2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10136870\/10136706\/10137177.pdf?arnumber=10137177","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,26]],"date-time":"2023-06-26T17:53:20Z","timestamp":1687802000000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10137177\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4]]},"references-count":16,"URL":"https:\/\/doi.org\/10.23919\/date56975.2023.10137177","relation":{},"subject":[],"published":{"date-parts":[[2023,4]]}}}