{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,17]],"date-time":"2025-12-17T18:12:47Z","timestamp":1765995167828},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,4]]},"DOI":"10.23919\/date56975.2023.10137310","type":"proceedings-article","created":{"date-parts":[[2023,6,2]],"date-time":"2023-06-02T19:32:57Z","timestamp":1685734377000},"source":"Crossref","is-referenced-by-count":9,"title":["Narrowing the Synthesis Gap: Academic FPGA Synthesis is Catching Up With the Industry"],"prefix":"10.23919","author":[{"given":"Benjamin L.C.","family":"Barzen","sequence":"first","affiliation":[{"name":"University of California,Department of EECS,Berkeley,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arya","family":"Reais-Parsi","sequence":"additional","affiliation":[{"name":"University of California,Department of EECS,Berkeley,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eddie","family":"Hung","sequence":"additional","affiliation":[{"name":"FPG-eh Research and University of British Columbia,Vancouver,Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minwoo","family":"Kang","sequence":"additional","affiliation":[{"name":"University of California,Department of EECS,Berkeley,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alan","family":"Mishchenko","sequence":"additional","affiliation":[{"name":"University of California,Department of EECS,Berkeley,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jonathan W.","family":"Greene","sequence":"additional","affiliation":[{"name":"University of California,Department of EECS,Berkeley,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"John","family":"Wawrzynek","sequence":"additional","affiliation":[{"name":"University of California,Department of EECS,Berkeley,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","first-page":"1","article-title":"Developing Synthesis Flows without Human Knowledge","author":"yu","year":"0","journal-title":"55th Annual Design Automation Conference"},{"key":"ref12","article-title":"BOiLS: Bayesian Optimisation for Logic Synthesis","author":"grosnit","year":"2021","journal-title":"ArXiv Preprint"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045559"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586206"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2007.4397290"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/275107.275118"},{"key":"ref2","author":"wolf","year":"0","journal-title":"Yosys Manual"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2015.7294007"},{"key":"ref8","year":"0","journal-title":"Our Git Repository for This Paper"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560122"},{"key":"ref9","year":"0","journal-title":"Opencores org"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3388617"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1007\/978-3-642-14295-6_5","article-title":"ABC: An Academic Industrial-Strength Verification Tool","author":"brayton","year":"2010","journal-title":"Computer Aided Verification"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1995.480022"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586331"}],"event":{"name":"2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)","location":"Antwerp, Belgium","start":{"date-parts":[[2023,4,17]]},"end":{"date-parts":[[2023,4,19]]}},"container-title":["2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10136870\/10136706\/10137310.pdf?arnumber=10137310","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,25]],"date-time":"2023-09-25T17:50:10Z","timestamp":1695664210000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10137310\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4]]},"references-count":15,"URL":"https:\/\/doi.org\/10.23919\/date56975.2023.10137310","relation":{},"subject":[],"published":{"date-parts":[[2023,4]]}}}