{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:20:41Z","timestamp":1774365641529,"version":"3.50.1"},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,3,25]],"date-time":"2024-03-25T00:00:00Z","timestamp":1711324800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,3,25]],"date-time":"2024-03-25T00:00:00Z","timestamp":1711324800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,3,25]]},"DOI":"10.23919\/date58400.2024.10546537","type":"proceedings-article","created":{"date-parts":[[2024,8,14]],"date-time":"2024-08-14T17:28:02Z","timestamp":1723656482000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving"],"prefix":"10.23919","author":[{"given":"Oussama","family":"Oulkaid","sequence":"first","affiliation":[{"name":"Univ. Lyon, EnsL, UCBL, CNRS, Inria, LIP,LYON Cedex 07,France,F-69342"}]},{"given":"Bruno","family":"Ferres","sequence":"additional","affiliation":[{"name":"Univ. Lyon, EnsL, UCBL, CNRS, Inria, LIP,LYON Cedex 07,France,F-69342"}]},{"given":"Matthieu","family":"Moy","sequence":"additional","affiliation":[{"name":"Univ. Lyon, EnsL, UCBL, CNRS, Inria, LIP,LYON Cedex 07,France,F-69342"}]},{"given":"Pascal","family":"Raymond","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes,CNRS, Grenoble INP*, VERIMAG,Grenoble,France,38000"}]},{"given":"Mehdi","family":"Khosravian","sequence":"additional","affiliation":[{"name":"Aniah,Grenoble,France,38000"}]},{"given":"Ludovic","family":"Henrio","sequence":"additional","affiliation":[{"name":"Univ. Lyon, EnsL, UCBL, CNRS, Inria, LIP,LYON Cedex 07,France,F-69342"}]},{"given":"Gabriel","family":"Radanne","sequence":"additional","affiliation":[{"name":"Univ. Lyon, EnsL, UCBL, CNRS, Inria, LIP,LYON Cedex 07,France,F-69342"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Microprocessor Trend Data","author":"Rupp"},{"key":"ref2","volume-title":"Part 8: The 2022 Wilson Research Group Functional Verification Study","author":"Foster"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137147"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333694"},{"key":"ref5","article-title":"Case Study: Power-aware IP and Mixed-Signal Verification","author":"Lang","year":"2010","journal-title":"DVCON (San Jose, Calif)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cds:19941246"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-013-0107-x"},{"key":"ref8","first-page":"4","author":"Blieck","year":"1996","journal-title":"Software Check for Power-down Mode of Analog Circuits"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0140"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/EOSESD.2015.7314740"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.3390\/electronics7060081"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.23919\/date.2017.7927102"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676408"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/smacd.2012.6339384"},{"key":"ref15","first-page":"1063","article-title":"A New Level-Up Shifter for High Speed and Wide Range Interface in Ultra Deep Sub-Micron","volume":"2","author":"Koo","year":"2005","journal-title":"ISCAS 2005"}],"event":{"name":"2024 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","location":"Valencia, Spain","start":{"date-parts":[[2024,3,25]]},"end":{"date-parts":[[2024,3,27]]}},"container-title":["2024 Design, Automation &amp;amp; Test in Europe Conference &amp;amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10546498\/10546499\/10546537.pdf?arnumber=10546537","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,15]],"date-time":"2024-08-15T04:28:45Z","timestamp":1723696125000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10546537\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,3,25]]},"references-count":15,"URL":"https:\/\/doi.org\/10.23919\/date58400.2024.10546537","relation":{},"subject":[],"published":{"date-parts":[[2024,3,25]]}}}