{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:48:37Z","timestamp":1773247717873,"version":"3.50.1"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,3,25]],"date-time":"2024-03-25T00:00:00Z","timestamp":1711324800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,3,25]],"date-time":"2024-03-25T00:00:00Z","timestamp":1711324800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100008367","name":"SNF","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100008367","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,3,25]]},"DOI":"10.23919\/date58400.2024.10546807","type":"proceedings-article","created":{"date-parts":[[2024,8,14]],"date-time":"2024-08-14T17:28:02Z","timestamp":1723656482000},"page":"1-6","source":"Crossref","is-referenced-by-count":7,"title":["Scalable Logic Rewriting Using Don't Cares"],"prefix":"10.23919","author":[{"given":"Alessandro Tempia","family":"Calvino","sequence":"first","affiliation":[{"name":"EPFL,Integrated Systems Laboratory,Lausanne,Switzerland"}]},{"given":"Giovanni","family":"De Micheli","sequence":"additional","affiliation":[{"name":"EPFL,Integrated Systems Laboratory,Lausanne,Switzerland"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Synthesis and Optimization of Digital Circuits","author":"De Micheli","year":"1994"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.804386"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/dac.2006.229287"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715185"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858312"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC52403.2022.9712552"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2897703"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/264995.264996"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14295-6_5"},{"key":"ref10","article-title":"The EPFL logic synthesis libraries","volume":"arXiv:1805.05121v3","author":"Soeken","year":"2022","journal-title":"CoRR"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203799"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2488484"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3232195.3232202"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/date54114.2022.9774558"},{"key":"ref15","article-title":"Scalable logic synthesis using a simple circuit structure","volume-title":"Proc. IWLS","author":"Mishchenko","year":"2006"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/12.35836"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/EDAC.1990.136647"},{"key":"ref18","article-title":"The EPFL combinational benchmark suite","volume-title":"Proc. IWLS","author":"Amaru","year":"2015"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2013.6718374"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/296399.296425"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3256341"}],"event":{"name":"2024 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","location":"Valencia, Spain","start":{"date-parts":[[2024,3,25]]},"end":{"date-parts":[[2024,3,27]]}},"container-title":["2024 Design, Automation &amp;amp; Test in Europe Conference &amp;amp; Exhibition (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10546498\/10546499\/10546807.pdf?arnumber=10546807","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,15]],"date-time":"2024-08-15T04:34:03Z","timestamp":1723696443000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10546807\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,3,25]]},"references-count":21,"URL":"https:\/\/doi.org\/10.23919\/date58400.2024.10546807","relation":{},"subject":[],"published":{"date-parts":[[2024,3,25]]}}}