{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,27]],"date-time":"2026-06-27T19:43:41Z","timestamp":1782589421918,"version":"3.54.5"},"reference-count":24,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10992710","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T17:36:35Z","timestamp":1747848995000},"page":"1-7","source":"Crossref","is-referenced-by-count":2,"title":["A Two-level SLC Cache Hierarchy for Hybrid SSDs"],"prefix":"10.23919","author":[{"given":"Li","family":"Cai","sequence":"first","affiliation":[{"name":"College of Computer and Information Science, Southwest University,Chongqing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhibing","family":"Sha","sequence":"additional","affiliation":[{"name":"College of Computer and Information Science, Southwest University,Chongqing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jun","family":"Li","sequence":"additional","affiliation":[{"name":"School of Computer Science, Nanjing University of Posts and Telecommunications,Nanjing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jiaojiao","family":"Wu","sequence":"additional","affiliation":[{"name":"College of Computer and Information Science, Southwest University,Chongqing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Huanhuan","family":"Tian","sequence":"additional","affiliation":[{"name":"College of Computer and Information Science, Southwest University,Chongqing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhigang","family":"Cai","sequence":"additional","affiliation":[{"name":"College of Computer and Information Science, Southwest University,Chongqing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jianwei","family":"Liao","sequence":"additional","affiliation":[{"name":"College of Computer and Information Science, Southwest University,Chongqing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2021.3117508"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2022.3178326"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/iccd46524.2019.00088"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2023.3342606"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2017.015070"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD53106.2021.00046"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2020.3049113"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2827033"},{"key":"ref9","article-title":"PAPA: Partial page-aware page allocation in TLC flash SSD for performance enhancement","author":"Fareed","year":"2020","journal-title":"MSST"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3392717.3392767"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3385073"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10136951"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2023.3338474"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3639826"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446719"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546573"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3677044"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3631529"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA57654.2024.00057"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/dac56929.2023.10247929"},{"key":"ref21","article-title":"MQSim: A framework for enabling realistic studies of modern Multi-QueueSSD devices","author":"Tavakkol","year":"2018","journal-title":"FAST"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1416944.1416949"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3078468.3078479"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2019.00-10"}],"event":{"name":"2025 Design, Automation & Test in Europe Conference (DATE)","location":"Lyon, France","start":{"date-parts":[[2025,3,31]]},"end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10992710.pdf?arnumber=10992710","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T05:54:19Z","timestamp":1747893259000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10992710\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":24,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10992710","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}