{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T06:10:11Z","timestamp":1747894211074,"version":"3.41.0"},"reference-count":38,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key R&D Program of China","doi-asserted-by":"publisher","award":["2023YFB4503100"],"award-info":[{"award-number":["2023YFB4503100"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62272026,62104014"],"award-info":[{"award-number":["62272026,62104014"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012226","name":"Fundamental Research Funds for the Central Universities","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100012226","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10992801","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T17:36:35Z","timestamp":1747848995000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["Swift-Sim: A Modular and Hybrid GPU Architecture Simulation Framework"],"prefix":"10.23919","author":[{"given":"Xiangrong","family":"Xu","sequence":"first","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]},{"given":"Yuanqiu","family":"Lv","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]},{"given":"Liang","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]},{"given":"Limin","family":"Xiao","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]},{"given":"Meng","family":"Han","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]},{"given":"Runnan","family":"Shen","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]},{"given":"Jinquan","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Beihang University,Beijing,China,100191"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589078"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA53966.2022.00056"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"411","DOI":"10.1145\/3307650.3322235","article-title":"Adaptive memory-side last-level gpu caching","volume-title":"Proceedings of the 46th international symposium on computer architecture","author":"Zhao","year":"2019"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2022.3154315"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"335","DOI":"10.1145\/2370816.2370865","article-title":"Multi2sim: A simulation framework for cpu-gpu computing","volume-title":"Proceedings of the 21st international conference on Parallel architectures and compilation techniques","author":"Ubal","year":"2012"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557150"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2014.2299539"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00047"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480063"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3470496.3527384"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2629677"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416636"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA51647.2021.00077"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"380","DOI":"10.1145\/3613424.3614277","article-title":"Path forward beyond simulators: Fast and accurate gpu execution time prediction for dnn workloads","volume-title":"Proceedings of the 56th Annual IEEE\/ACM International Symposium on Microarchitecture","author":"Li","year":"2023"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480100"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2878671"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO50266.2020.00085"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2063384.2063454"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557148"},{"key":"ref22","first-page":"118","article-title":"Multi-processor system-on-chip design space exploration based on multilevel modeling techniques","volume-title":"2009 International Symposium on Systems, Architectures, Modeling, and Simulation. IEEE","author":"Mariani","year":"2009"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557149"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1105734.1105748"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/4.509850"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.59"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835955"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2014.53"},{"key":"ref29","first-page":"1227","article-title":"Photon: A fine-grained sampled simulation methodology for gpu workloads","volume-title":"Proceedings of the 56th Annual IEEE\/ACM International Symposium on Microarchitecture, 2023","author":"Liu"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA57654.2024.00088"},{"key":"ref31","doi-asserted-by":"crossref","first-page":"197","DOI":"10.1145\/3307650.3322230","article-title":"Mgpusim: Enabling multi-gpu performance modeling and optimization","volume-title":"Proceedings of the 46th International Symposium on Computer Architecture","author":"Sun","year":"2019"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358307"},{"article-title":"Nvidia graphics cards","volume-title":"NVIDIA","year":"2024","key":"ref33"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"volume-title":"Polybench: The polyhedral benchmark suite","year":"2012","author":"Pouchet","key":"ref35"},{"key":"ref36","doi-asserted-by":"crossref","first-page":"260","DOI":"10.1145\/1454115.1454152","article-title":"Mars: a mapreduce framework on graphics processors","volume-title":"Proceedings of the 17th international conference on Parallel architectures and compilation techniques","author":"He","year":"2008"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2019.00021"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2013.6704684"}],"event":{"name":"2025 Design, Automation & Test in Europe Conference (DATE)","start":{"date-parts":[[2025,3,31]]},"location":"Lyon, France","end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10992801.pdf?arnumber=10992801","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T05:31:59Z","timestamp":1747891919000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10992801\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":38,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10992801","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}