{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:33:36Z","timestamp":1772724816023,"version":"3.50.1"},"reference-count":25,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10992880","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T17:36:35Z","timestamp":1747848995000},"page":"1-7","source":"Crossref","is-referenced-by-count":4,"title":["AraXL: A Physically Scalable, Ultra-Wide RISC-V Vector Processor Design for Fast and Efficient Computation on Long Vectors"],"prefix":"10.23919","author":[{"given":"Navaneeth Kunhi","family":"Purayil","sequence":"first","affiliation":[{"name":"ETH Zürich,Zürich,Switzerland"}]},{"given":"Matteo","family":"Perotti","sequence":"additional","affiliation":[{"name":"ETH Zürich,Zürich,Switzerland"}]},{"given":"Tim","family":"Fischer","sequence":"additional","affiliation":[{"name":"ETH Zürich,Zürich,Switzerland"}]},{"given":"Luca","family":"Benini","sequence":"additional","affiliation":[{"name":"ETH Zürich,Zürich,Switzerland"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2014.73"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/PDP62718.2024.00048"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/359327.359336"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3422667"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3624062.3624232"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3624062.3624231"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3437801.3441592"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2023.01.015"},{"key":"ref9","volume-title":"AWS Graviton - Getting started","author":"Services","year":"2024"},{"key":"ref10","article-title":"Supercomputer Fugaku CPU A64FX realizing high performance, high-density packaging, and low power consumption","volume-title":"Fujitsu Technical Review","author":"Okazaki","year":"2020"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.4230\/LIPIcs.ECRTS.2021.1"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3575861"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2024.3388896"},{"key":"ref14","year":"2022","journal-title":"SiFive Intelligence X280, SiFive Corp."},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/hcs59251.2023.10254712"},{"key":"ref16","article-title":"AndesCore\u2122 NX27V Processor","volume-title":"Andes Technology","year":"2024"},{"key":"ref17","article-title":"SiFive announces differentiated solutions for generative AI and ML applications leading RISC-V into a new era of high-performance innovation","volume-title":"SiFive","year":"2024"},{"key":"ref18","year":"2022","journal-title":"SiFive Performance P270, SiFive Corp."},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2025.3528349"},{"key":"ref20","article-title":"Arrow: A RISC-V vector accelerator for machine learning inference","volume-title":"Fifth Workshop on Computer Architecture Research with RISC-V (CARRV 2021)","author":"Assir","year":"2021"},{"key":"ref21","article-title":"AndesCore\u2122 AX45MPV","volume-title":"Andes Technology","year":"2024"},{"key":"ref22","article-title":"Semidynamics vector unit","volume-title":"Semidynamics.","year":"2024"},{"key":"ref23","article-title":"NEC SX-Aurora TSUBASA architecture","volume-title":"NEC Corporation","year":"2024"},{"key":"ref24","article-title":"The Llama 3 herd of models","volume-title":"Meta Platforms Inc.","year":"2025"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2926114"}],"event":{"name":"2025 Design, Automation & Test in Europe Conference (DATE)","location":"Lyon, France","start":{"date-parts":[[2025,3,31]]},"end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10992880.pdf?arnumber=10992880","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T06:01:18Z","timestamp":1747893678000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10992880\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":25,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10992880","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}