{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T06:40:07Z","timestamp":1747896007942,"version":"3.41.0"},"reference-count":28,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key R&D Program of China","doi-asserted-by":"publisher","award":["2019YFA0709600,2019YFA0709602"],"award-info":[{"award-number":["2019YFA0709600,2019YFA0709602"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["92373207,62090025"],"award-info":[{"award-number":["92373207,62090025"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10992976","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T17:36:35Z","timestamp":1747848995000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["GTN-Cell: Efficient Standard Cell Characterization Using Graph Transformer Network"],"prefix":"10.23919","author":[{"given":"Lihao","family":"Liu","sequence":"first","affiliation":[{"name":"School of Microelectronics, Fudan University,State Key Lab of Integrated Chips and Systems,Shanghai,China"}]},{"given":"Yunhui","family":"Li","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Fudan University,State Key Lab of Integrated Chips and Systems,Shanghai,China"}]},{"given":"Beisi","family":"Lu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Fudan University,State Key Lab of Integrated Chips and Systems,Shanghai,China"}]},{"given":"Li","family":"Shang","sequence":"additional","affiliation":[{"name":"School of Computer Science, Fudan University,State Key Lab of Integrated Chips and Systems,Shanghai,China"}]},{"given":"Fan","family":"Yang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Fudan University,State Key Lab of Integrated Chips and Systems,Shanghai,China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2021.3061484"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2336511"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/WITS.2017.7934646"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530598"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484737"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS53924.2021.9665573"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2011.5770767"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s11432-021-3407-2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742884"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3069664"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3526241.3530343"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3400302.3415605","article-title":"Aadam: A fast, accurate, and versatile aging-aware cell library delay model using feed-forward neural network","volume-title":"Proceedings of the 39th International Conference on Computer-Aided Design","author":"Ebrahimipour","year":"2020"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2023.3298917"},{"key":"ref14","article-title":"Graph attention networks","author":"Veli\u010dkovi\u0107","year":"2017","journal-title":"arXiv preprint"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"787","DOI":"10.1145\/1837274.1837473","article-title":"RDE-based transistor-level gate simulation for statistical static timing analysis","volume-title":"Proceedings of the 47th Design Automation Conference (DAC)","author":"Tang","year":"2010"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3009624"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391590"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"425","DOI":"10.1145\/1391469.1391580","article-title":"Driver waveform computation for timing analysis with multiple voltage threshold driver models","volume-title":"Proceedings of the 45th annual Design Automation Conference (DAC)","author":"Feldmann","year":"2008"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546520"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218515"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546799"},{"key":"ref22","article-title":"Attention is all you need","author":"Vaswani","year":"2017","journal-title":"Advances in Neural Information Processing Systems"},{"key":"ref23","article-title":"A general-ization of transformer networks to graphs","author":"Dwivedi","year":"2020","journal-title":"arXiv preprint"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/j.aiopen.2021.01.001"},{"key":"ref25","first-page":"28877","article-title":"Do transformers really perform badly for graph representation","volume":"34","author":"Ying","year":"2021","journal-title":"Advances in neural information processing systems"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.48550\/ARXIV.1609.02907"},{"key":"ref27","article-title":"Fast graph representation learning with pytorch geometric","author":"Fey","year":"2019","journal-title":"arXiv preprint"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2016.04.006"}],"event":{"name":"2025 Design, Automation & Test in Europe Conference (DATE)","start":{"date-parts":[[2025,3,31]]},"location":"Lyon, France","end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10992976.pdf?arnumber=10992976","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T06:02:51Z","timestamp":1747893771000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10992976\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":28,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10992976","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}