{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,20]],"date-time":"2026-03-20T21:34:54Z","timestamp":1774042494726,"version":"3.50.1"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10993029","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T13:36:35Z","timestamp":1747834595000},"page":"1-2","source":"Crossref","is-referenced-by-count":0,"title":["VToT: Automatic Verilog Generation via LLMs with Tree of Thoughts Prompting"],"prefix":"10.23919","author":[{"given":"Yingjie","family":"Zhou","sequence":"first","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Renzhi","family":"Chen","sequence":"additional","affiliation":[{"name":"Qiyuan Laboratory,Beijing,China"}]},{"given":"Xinyu","family":"Li","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Jingkai","family":"Wang","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Zhigang","family":"Fang","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Bowei","family":"Wang","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Wenqiang","family":"Bai","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Qilin","family":"Cao","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Lei","family":"Wang","sequence":"additional","affiliation":[{"name":"Defense Innovation Institute, Academy of Military Sciences,Beijing,China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3657356"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3657353"},{"key":"ref3","volume-title":"To-wards LLM-Powered Verilog RTL Assistant: Self-Verification and Self-Correction","author":"Huang","year":"2024"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/iccad57390.2023.10323812"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/asp-dac58780.2024.10473904"}],"event":{"name":"2025 Design, Automation &amp; Test in Europe Conference (DATE)","location":"Lyon, France","start":{"date-parts":[[2025,3,31]]},"end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation &amp;amp; Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10993029.pdf?arnumber=10993029","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,20]],"date-time":"2026-03-20T19:54:22Z","timestamp":1774036462000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10993029\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":5,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10993029","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}