{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:19:11Z","timestamp":1774365551004,"version":"3.50.1"},"reference-count":33,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key R&D Program of China","doi-asserted-by":"publisher","award":["2022YFB4500200"],"award-info":[{"award-number":["2022YFB4500200"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62102257"],"award-info":[{"award-number":["62102257"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10993072","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T13:36:35Z","timestamp":1747834595000},"page":"1-7","source":"Crossref","is-referenced-by-count":15,"title":["HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers"],"prefix":"10.23919","author":[{"given":"Yiyao","family":"Yang","sequence":"first","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University,Shanghai,China"}]},{"given":"Fu","family":"Teng","sequence":"additional","affiliation":[{"name":"School of Software Technology, Zhejiang University,Ningbo,China"}]},{"given":"Pengju","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University,Shanghai,China"}]},{"given":"Mengnan","family":"Qi","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University,Shanghai,China"}]},{"given":"Chenyang","family":"Lv","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University,Shanghai,China"}]},{"given":"Ji","family":"Li","sequence":"additional","affiliation":[{"name":"Independent Researcher"}]},{"given":"Xuhong","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Software Technology, Zhejiang University,Ningbo,China"}]},{"given":"Zhezhi","family":"He","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University,Shanghai,China"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Wizardcoder: Empowering code large language models with evol-instruct","author":"Luo","year":"2024"},{"key":"ref2","volume-title":"Octopack: Instruction tuning code large language models","author":"Muennighoff","year":"2024"},{"key":"ref3","article-title":"Gpt-4 technical report","volume-title":"OpenAI, Tech. Rep.","year":"2024"},{"key":"ref4","article-title":"Magicoder: Source code is all you need","volume-title":"ICML","author":"Wei","year":"2024"},{"key":"ref5","article-title":"WizardLM: Empowering large language models to follow complex instructions","volume-title":"International Conference on Learning Representations (ICLR)","author":"Xu","year":"2024"},{"key":"ref6","volume-title":"Opencodeinterpreter: Integrating code generation with execution and refinement","author":"Zheng","year":"2024"},{"key":"ref7","volume-title":"Github copilot","year":"2021"},{"key":"ref8","volume-title":"Evaluating large language models trained on code","author":"Chen","year":"2021"},{"key":"ref9","article-title":"Is your code generated by chatgpt really correct? rigorous evaluation of large language models for code generation","volume-title":"Proceedings of the 37th International Conference on Neural Information Processing Systems, ser. NIPS \u201923","author":"Liu","year":"2024"},{"key":"ref10","article-title":"Verilogeval: Evaluating large language models for verilog code generation","volume-title":"2023 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","author":"Liu","year":"2023"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3571730"},{"key":"ref12","volume-title":"Codehalu: Investigating code hallucinations in llms via execution-based verification","author":"Tian","year":"2024"},{"key":"ref13","volume-title":"Exploring and evaluating hallucinations in 11m-powered code generation","author":"Liu","year":"2024"},{"key":"ref14","volume-title":"Starcoder: may the source be with you!","author":"Li","year":"2023"},{"key":"ref15","volume-title":"Revisiting verilogeval: Newer Ilms, in-context learning, and specification-to-rtl tasks","author":"Pinckney","year":"2024"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3657353"},{"key":"ref17","doi-asserted-by":"crossref","DOI":"10.1145\/3676536.3676830","article-title":"Origen: Enhancing rtl code generation with code-to-code augmentation and self-reflection","volume-title":"International Conference on Computer-Aided Design","author":"Cui","year":"2024"},{"key":"ref18","article-title":"Fpga implementation of image enhancement using verilog hdl","author":"Badiger","year":"2020","journal-title":"International Research Journal of Engineering and Technology (IRJET)"},{"key":"ref19","volume-title":"Digital System Designs and Practices: Using Verilog HDL and FPGAs","author":"Lin","year":"2008"},{"key":"ref21","doi-asserted-by":"crossref","DOI":"10.1109\/LAD62341.2024.10691788","article-title":"Rtlcoder: Outperforming GPT-3.5 in design RTL generation with our open-source dataset and lightweight solution","volume-title":"IEEE International Workshop on LLM-Aided Design (LAD)","author":"Liu","year":"2024"},{"key":"ref22","doi-asserted-by":"crossref","DOI":"10.1109\/ICCD63220.2024.00033","article-title":"Autovcoder: A systematic framework for automated verilog code generation using llms","volume-title":"Proceedings of the International Conference on Computer Design (ICCD)","author":"Gao","year":"2024"},{"key":"ref23","volume-title":"Advanced Digital Design with the Verilog HDL","author":"Ciletti","year":"2010"},{"key":"ref24","volume-title":"Verilog\u00ae hdl: a guide to digital design and synthesis, second edition","author":"Palnitkar","year":"2003"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-10552-5"},{"key":"ref26","volume-title":"Slang","author":"Popoloski","year":"2023"},{"key":"ref27","volume-title":"Code llama: Open foundation models for code","author":"Roziere","year":"2023"},{"key":"ref28","volume-title":"Deepseek-coder: When the large language model meets programming - the rise of code intelligence","author":"Guo","year":"2024"},{"key":"ref29","volume-title":"Qwen technical report","author":"Bai","year":"2023"},{"key":"ref30","volume-title":"Chipnemo: Domain-adapted llms for chip design","author":"Liu","year":"2023"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3643681"},{"key":"ref32","first-page":"21","article-title":"Betterv: Controlled verilog generation with discriminative guidance","volume-title":"International Conference on Machine Learning (ICML)","author":"Pei"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/asp-dac58780.2024.10473904"},{"key":"ref34","volume-title":"Deepseek-coder-v2: Breaking the barrier of closed-source models in code intelligence","author":"DeepSeek-AI","year":"2024"}],"event":{"name":"2025 Design, Automation & Test in Europe Conference (DATE)","location":"Lyon, France","start":{"date-parts":[[2025,3,31]]},"end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10993072.pdf?arnumber=10993072","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,5]],"date-time":"2025-09-05T18:03:06Z","timestamp":1757095386000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10993072\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":33,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10993072","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}