{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,23]],"date-time":"2025-05-23T04:05:21Z","timestamp":1747973121542,"version":"3.41.0"},"reference-count":26,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62474152"],"award-info":[{"award-number":["62474152"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10993137","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T17:36:35Z","timestamp":1747848995000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["PICELF: An Automatic Electronic Layer Layout Generation Framework for Photonic Integrated Circuits"],"prefix":"10.23919","author":[{"given":"Xiaohan","family":"Jiang","sequence":"first","affiliation":[{"name":"The Hong Kong University of Science and Technology,Department of Electronic and Computer Engineering"}]},{"given":"Yinyi","family":"Liu","sequence":"additional","affiliation":[{"name":"The Hong Kong University of Science and Technology,Department of Electronic and Computer Engineering"}]},{"given":"Peiyu","family":"Chen","sequence":"additional","affiliation":[{"name":"Microelectronics Thrust, The Hong Kong University of Science and Technology (Guangzhou)"}]},{"given":"Wei","family":"Zhang","sequence":"additional","affiliation":[{"name":"The Hong Kong University of Science and Technology,Department of Electronic and Computer Engineering"}]},{"given":"Jiang","family":"Xu","sequence":"additional","affiliation":[{"name":"Microelectronics Thrust, The Hong Kong University of Science and Technology (Guangzhou)"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1002\/adom.202301028"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1038\/nphoton.2017.93"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-022-04714-0"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1126\/science.adl1203"},{"key":"ref5","first-page":"1309","article-title":"Cross-layer floorplan optimization for silicon photonic nocs in many-core systems","volume-title":"2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)","author":"Coskun"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240789"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691109"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2830716"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465775"},{"key":"ref10","first-page":"1","article-title":"Psion 2: Optimizing physical layout of wavelength-routed onocs for laser power reduction","volume-title":"Proceedings of the 39th International Conference on Computer-Aided Design","author":"Truppel"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629983"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6165031"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2012.6292091"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2317575"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2760508"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218637"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3133856"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465879"},{"key":"ref19","first-page":"606","article-title":"An integer linear programming based routing algorithm for flip-chip design","volume-title":"Proceedings of the 44th annual Design Automation Conference","author":"Fang"},{"key":"ref20","first-page":"1088","article-title":"Obstacle-avoiding free-assignment routing for flip-chip designs","volume-title":"Proceedings of the 49th Annual Design Automation Conference","author":"Lee"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2911006"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419881"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586143"},{"key":"ref24","first-page":"170","article-title":"A unified printed circuit board routing algorithm with complicated constraints and differential pairs","author":"Lin","journal-title":"Proceedings of the 26th Asia and South Pacific Design Automation Conference"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TSSC.1968.300136"},{"journal-title":"Klayout","year":"2020","author":"K\u00f6fferlein","key":"ref27"}],"event":{"name":"2025 Design, Automation &amp; Test in Europe Conference (DATE)","start":{"date-parts":[[2025,3,31]]},"location":"Lyon, France","end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation &amp;amp; Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10993137.pdf?arnumber=10993137","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T05:51:12Z","timestamp":1747893072000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10993137\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":26,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10993137","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}