{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T15:02:07Z","timestamp":1773414127094,"version":"3.50.1"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T00:00:00Z","timestamp":1743379200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,3,31]]},"DOI":"10.23919\/date64628.2025.10993229","type":"proceedings-article","created":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T17:36:35Z","timestamp":1747848995000},"page":"1-7","source":"Crossref","is-referenced-by-count":1,"title":["COMPASS: A Compiler Framework for Resource-Constrained Crossbar-Array Based In-Memory Deep Learning Accelerators"],"prefix":"10.23919","author":[{"given":"Jihoon","family":"Park","sequence":"first","affiliation":[{"name":"Seoul National University,Seoul,South Korea"}]},{"given":"Jeongin","family":"Choe","sequence":"additional","affiliation":[{"name":"Seoul National University,Seoul,South Korea"}]},{"given":"Dohyun","family":"Kim","sequence":"additional","affiliation":[{"name":"Seoul National University,Seoul,South Korea"}]},{"given":"Jae-Joon","family":"Kim","sequence":"additional","affiliation":[{"name":"Seoul National University,Seoul,South Korea"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247928"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/dac.2018.8465832"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365788"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"1","DOI":"10.23919\/VLSICircuits52068.2021.9492403","article-title":"Pimca: A 3.4-mb programmable in-memory computing accelerator in 28nm for on-chip dnn inference","volume-title":"2021 Symposium on VLSI Technology","author":"Yin","year":"2021"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365769"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067610"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731715"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2024.3442013"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067339"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3386462"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304049"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2020.2973991"}],"event":{"name":"2025 Design, Automation & Test in Europe Conference (DATE)","location":"Lyon, France","start":{"date-parts":[[2025,3,31]]},"end":{"date-parts":[[2025,4,2]]}},"container-title":["2025 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10992638\/10992588\/10993229.pdf?arnumber=10993229","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,22]],"date-time":"2025-05-22T05:39:42Z","timestamp":1747892382000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10993229\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,31]]},"references-count":14,"URL":"https:\/\/doi.org\/10.23919\/date64628.2025.10993229","relation":{},"subject":[],"published":{"date-parts":[[2025,3,31]]}}}