{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T06:00:27Z","timestamp":1780639227273,"version":"3.54.1"},"reference-count":31,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T00:00:00Z","timestamp":1776643200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T00:00:00Z","timestamp":1776643200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,20]]},"DOI":"10.23919\/date69613.2026.11539269","type":"proceedings-article","created":{"date-parts":[[2026,6,4]],"date-time":"2026-06-04T19:53:10Z","timestamp":1780602790000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["Special Day \u2013 GUIDE: GenAI Units In Digital Design Education"],"prefix":"10.23919","author":[{"given":"Weihua","family":"Xiao","sequence":"first","affiliation":[{"name":"NYU Tandon,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jason","family":"Blocklove","sequence":"additional","affiliation":[{"name":"NYU Tandon,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Matthew","family":"DeLorenzo","sequence":"additional","affiliation":[{"name":"Texas A&#x0026;M,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Johann","family":"Knechtel","sequence":"additional","affiliation":[{"name":"NYU Abu Dhabi,UAE"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ozgur","family":"Sinanoglu","sequence":"additional","affiliation":[{"name":"NYU Abu Dhabi,UAE"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kanad","family":"Basu","sequence":"additional","affiliation":[{"name":"RPI,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jeyavijayan","family":"Rajendran","sequence":"additional","affiliation":[{"name":"Texas A&#x0026;M,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Siddharth","family":"Garg","sequence":"additional","affiliation":[{"name":"NYU Tandon,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ramesh","family":"Karri","sequence":"additional","affiliation":[{"name":"NYU Tandon,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.48550\/ARXIV.1706.03762"},{"key":"ref2","article-title":"Llm-aided efficient hardware design automation","author":"Xu","year":"2024"},{"key":"ref3","doi-asserted-by":"crossref","DOI":"10.1145\/3723876","article-title":"Automatically improving llm-based verilog generation using eda tool feedback","author":"Blocklove","year":"2025"},{"key":"ref4","article-title":"Llm-aided testbench generation and bug detection for finite-state machines","author":"Bhandari","year":"2025"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD65511.2025.11189208"},{"key":"ref6","article-title":"Autochip: Automating hdl generation using llm feedback","author":"Thakur","year":"2023"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD62225.2024.10740247"},{"key":"ref8","article-title":"Veritas: Deterministic verilog code synthesis from llm-generated conjunctive normal form","author":"Roy","year":"2025"},{"key":"ref9","article-title":"Prefixllm: Llm-aided prefix circuit design","author":"Xiao","year":"2024"},{"key":"ref10","article-title":"Veridispatcher: Multi-model dispatching through preinference difficulty prediction for rtl generation optimization","author":"Wang","year":"2025"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137086"},{"key":"ref12","article-title":"Verithoughts: Enabling automated verilog code generation using reasoning and formal verification","author":"Yubeaton","year":"2025"},{"key":"ref13","article-title":"VeriReason: Reinforcement learning with testbench feedback for reasoning-enhanced verilog generation","author":"Wang","year":"2025"},{"key":"ref14","doi-asserted-by":"crossref","DOI":"10.1109\/ICLAD65226.2025.00017","article-title":"Vericontaminated: Assessing llm-driven verilog coding for data contamination","author":"Wang","year":"2025"},{"key":"ref15","article-title":"Educational perspectives on llm architectures: Analyzing code generation for circuits and systems","volume-title":"ISCAS","author":"Karn"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3764934"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3649476.3660378"},{"key":"ref18","article-title":"Llmpirate: Llms for black-box hardware ip piracy","author":"Gohil","year":"2024"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3548606.3560690"},{"key":"ref20","article-title":"Unleashing ghost: An llm-powered framework for automated hardware trojan design","author":"Faruque","year":"2024"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.23919\/DATE64628.2025.10993260"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2024.3372809"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546558"},{"key":"ref24","first-page":"1","article-title":"Nspg: Natural language processing-based security property generator for hardware security assurance","volume-title":"Proceedings of the 61st ACM\/IEEE Design Automation Conference","author":"Meng"},{"key":"ref25","article-title":"Trojanloc: Llm-based framework for rtl trojan localization","author":"Xiao","year":"2025"},{"key":"ref26","article-title":"Lockforge: Automating paper-to-code for logic locking with multi-agent reasoning llms","author":"Saha","year":"2025"},{"key":"ref27","doi-asserted-by":"crossref","DOI":"10.1109\/MLCAD65511.2025.11189152","article-title":"Salad: Systematic assessment of machine unlearning on llm-aided hardware design","author":"Wang","year":"2025"},{"key":"ref28","article-title":"Cognichip: AI-Enabled Chip Design Platform","year":"2025"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2024.3381097"},{"key":"ref30","article-title":"Cybersecurity games & conference","author":"Karri","year":"2025"},{"key":"ref31","article-title":"JBlocklove\/LLMs-for-EDA-Tutorial","author":"Blocklove","year":"2026"}],"event":{"name":"2026 Design, Automation &amp; Test in Europe Conference (DATE)","location":"Verona, Italy","start":{"date-parts":[[2026,4,20]]},"end":{"date-parts":[[2026,4,22]]}},"container-title":["2026 Design, Automation &amp;amp; Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11539023\/11539024\/11539269.pdf?arnumber=11539269","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T05:07:10Z","timestamp":1780636030000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11539269\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,20]]},"references-count":31,"URL":"https:\/\/doi.org\/10.23919\/date69613.2026.11539269","relation":{},"subject":[],"published":{"date-parts":[[2026,4,20]]}}}