{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T06:02:43Z","timestamp":1780639363546,"version":"3.54.1"},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T00:00:00Z","timestamp":1776643200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T00:00:00Z","timestamp":1776643200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100020950","name":"National Science and Technology Council","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100020950","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,20]]},"DOI":"10.23919\/date69613.2026.11539381","type":"proceedings-article","created":{"date-parts":[[2026,6,4]],"date-time":"2026-06-04T19:53:10Z","timestamp":1780602790000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["Enabling Cross-Design Power Trace Prediction with GNNs for Gate-Level Netlists"],"prefix":"10.23919","author":[{"given":"Shih-Chun","family":"Lin","sequence":"first","affiliation":[{"name":"National Taiwan University of Science and Technology,Department of Electrical Engineering,Taipei,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yung-Chih","family":"Chen","sequence":"additional","affiliation":[{"name":"National Taiwan University of Science and Technology,Department of Electrical Engineering,Taipei,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bo-Hao","family":"Huang","sequence":"additional","affiliation":[{"name":"National Taiwan University of Science and Technology,Department of Electrical Engineering,Taipei,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume":"abs\/2403.07257","author":"Chen","year":"2024","journal-title":"The dawn of ai-native EDA: promises and challenges of large circuit models"},{"key":"ref2","first-page":"1","article-title":"Primal: Power inference using machine learning","volume-title":"2019 56th ACM\/IEEE Design Automation Conference (DAC)","author":"Zhou"},{"key":"ref3","article-title":"Active learning-based practical power estimation considering multi-cycle paths","volume-title":"2024 25th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)","author":"Liu"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISEDA62518.2024.10617476"},{"key":"ref5","article-title":"PrimeTime: Static timing analysis","year":"2024"},{"key":"ref6","article-title":"PrimePower: RTL to signoff power analysis","year":"2024"},{"key":"ref7","volume":"abs\/1312.6203","author":"Bruna","year":"2013","journal-title":"Spectral networks and locally connected networks on graphs"},{"key":"ref8","article-title":"Convolutional neural networks on graphs with fast localized spectral filtering","author":"Defferrard","year":"2016","journal-title":"Neural Information Processing Systems"},{"key":"ref9","article-title":"Inductive representation learning on large graphs","volume-title":"Advances in Neural Information Processing Systems","volume":"30","author":"Hamilton","year":"2017"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218643"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3657349"},{"key":"ref12","article-title":"Design compiler: Timing, area, power, & test optimization","year":"2024"},{"key":"ref13","article-title":"VCS","year":"2024"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/54.785838"},{"key":"ref15","article-title":"The EPFL combinational benchmark suite","author":"Amaru","year":"2019"},{"key":"ref16","article-title":"Pytorch: An imperative style, high-performance deep learning library","volume":"32","author":"Paszke","year":"2019","journal-title":"Advances in neural information processing systems"}],"event":{"name":"2026 Design, Automation &amp; Test in Europe Conference (DATE)","location":"Verona, Italy","start":{"date-parts":[[2026,4,20]]},"end":{"date-parts":[[2026,4,22]]}},"container-title":["2026 Design, Automation &amp;amp; Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11539023\/11539024\/11539381.pdf?arnumber=11539381","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T05:20:30Z","timestamp":1780636830000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11539381\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,20]]},"references-count":16,"URL":"https:\/\/doi.org\/10.23919\/date69613.2026.11539381","relation":{},"subject":[],"published":{"date-parts":[[2026,4,20]]}}}