{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T06:02:09Z","timestamp":1780639329656,"version":"3.54.1"},"reference-count":27,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T00:00:00Z","timestamp":1776643200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T00:00:00Z","timestamp":1776643200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,20]]},"DOI":"10.23919\/date69613.2026.11539613","type":"proceedings-article","created":{"date-parts":[[2026,6,4]],"date-time":"2026-06-04T19:53:10Z","timestamp":1780602790000},"page":"1-3","source":"Crossref","is-referenced-by-count":0,"title":["Late Breaking Results: Float Fight - Verifying Floating-Point Behavior in RISC-V Simulators"],"prefix":"10.23919","author":[{"given":"Katharina","family":"Ruep","sequence":"first","affiliation":[{"name":"Johannes Kepler University,Institute for Complex Systems,Linz,Austria"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Manfred","family":"Schl\u00e4gl","sequence":"additional","affiliation":[{"name":"Johannes Kepler University,Institute for Complex Systems,Linz,Austria"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Daniel","family":"Gro\u00dfe","sequence":"additional","affiliation":[{"name":"Johannes Kepler University,Institute for Complex Systems,Linz,Austria"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-04570-7_6"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.23919\/EETA.2018.8493233"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1088\/0031-9155\/51\/4\/008"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1353445.1353446"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-8176-4705-6"},{"key":"ref6","year":"1985","journal-title":"IEEE Computer Society Std. IEEE Std 754-1985"},{"key":"ref7","volume-title":"The RISC-V Instruction Set Manual; Volume I: Unprivileged ISA","author":"Waterman","year":"2019"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.21236\/ada605735"},{"key":"ref9","article-title":"Berkeley SoftFloat","author":"Hauser"},{"key":"ref10","article-title":"Modified Spike using FloppyFloat","author":"Zurstra\u00dfen","year":"2025"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE64628.2025.10992803"},{"key":"ref12","article-title":"RISC-V VP++: Next generation open-source virtual prototype","volume-title":"Workshop on Open-Source Design Automation (OSDA)","author":"Schl\u00e4gl"},{"key":"ref13","article-title":"QEMU a generic and open source machine emulator and virtualizer","year":"2025"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116193"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FDL50818.2020.9232941"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3453688.3461497"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774771"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676755"},{"key":"ref19","first-page":"1307","article-title":"MorFuzz: Fuzzing processor via runtime instruction morphing enhanced synchronizable co-simulation","volume-title":"USENIX Security Symposium (USENIX)","author":"Xu"},{"issue":"9","key":"ref20","first-page":"3141","article-title":"A RISC-V test sequences generation method based on instruction generation constraints","volume":"45","author":"Liu","year":"2023","journal-title":"Journal of Electronics & Information Technology"},{"key":"ref21","first-page":"5341","article-title":"Cascade: CPU fuzzing via intricate program generation","volume-title":"USENIX Security Symposium (USENIX)","author":"Solt"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2023.3262741"},{"key":"ref23","article-title":"RISCV-DV","year":"2024"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.23919\/DATE64628.2025.10992760"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218629"},{"key":"ref26","article-title":"riscvovpsim","year":"2025"},{"key":"ref27","article-title":"The RISC-V Instruction Set Manual, Volume I: User-Level ISA","year":"2025","journal-title":"RISC-V Foundation"}],"event":{"name":"2026 Design, Automation & Test in Europe Conference (DATE)","location":"Verona, Italy","start":{"date-parts":[[2026,4,20]]},"end":{"date-parts":[[2026,4,22]]}},"container-title":["2026 Design, Automation & Test in Europe Conference (DATE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11539023\/11539024\/11539613.pdf?arnumber=11539613","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T05:16:36Z","timestamp":1780636596000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11539613\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,20]]},"references-count":27,"URL":"https:\/\/doi.org\/10.23919\/date69613.2026.11539613","relation":{},"subject":[],"published":{"date-parts":[[2026,4,20]]}}}