{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T06:51:51Z","timestamp":1725691911350},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,5,22]],"date-time":"2023-05-22T00:00:00Z","timestamp":1684713600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,5,22]],"date-time":"2023-05-22T00:00:00Z","timestamp":1684713600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,5,22]]},"DOI":"10.23919\/mipro57284.2023.10159698","type":"proceedings-article","created":{"date-parts":[[2023,6,29]],"date-time":"2023-06-29T17:20:56Z","timestamp":1688059256000},"page":"208-212","source":"Crossref","is-referenced-by-count":0,"title":["Performance Analysis of 1-MHz Voltage-Controlled Ring Oscillator Designed in 180-nm CMOS Technology for Phase-Locked Loop"],"prefix":"10.23919","author":[{"given":"Alma","family":"Tra\u017eivuk","sequence":"first","affiliation":[{"name":"University of Zagreb Faculty of Electrical Engineering and Computing, Unska 3,Zagreb,Croatia,10000"}]},{"given":"Adrijan","family":"Bari\u0107","sequence":"additional","affiliation":[{"name":"University of Zagreb Faculty of Electrical Engineering and Computing, Unska 3,Zagreb,Croatia,10000"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2193517"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.23919\/MIPRO55190.2022.9803558"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/MIPRO52101.2021.9597170"},{"journal-title":"Design of Analog CMOS Integrated Circuits","year":"2001","author":"razavi","key":"ref5"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337641"},{"key":"ref1","doi-asserted-by":"crossref","DOI":"10.1017\/9781108626200","author":"razavi","year":"2020","journal-title":"Design of CMOS Phase-Locked Loops From Circuit Level to Architecture Level"}],"event":{"name":"2023 46th MIPRO ICT and Electronics Convention (MIPRO)","start":{"date-parts":[[2023,5,22]]},"location":"Opatija, Croatia","end":{"date-parts":[[2023,5,26]]}},"container-title":["2023 46th MIPRO ICT and Electronics Convention (MIPRO)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10159631\/10159632\/10159698.pdf?arnumber=10159698","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,12,11]],"date-time":"2023-12-11T19:01:54Z","timestamp":1702321314000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10159698\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,5,22]]},"references-count":6,"URL":"https:\/\/doi.org\/10.23919\/mipro57284.2023.10159698","relation":{},"subject":[],"published":{"date-parts":[[2023,5,22]]}}}