{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,31]],"date-time":"2024-10-31T03:13:04Z","timestamp":1730344384699,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,6]]},"DOI":"10.23919\/mixdes.2018.8436868","type":"proceedings-article","created":{"date-parts":[[2018,8,17]],"date-time":"2018-08-17T20:14:20Z","timestamp":1534536860000},"page":"416-419","source":"Crossref","is-referenced-by-count":3,"title":["IP Core of Coprocessor for Multiple-Precision-Arithmetic Computations"],"prefix":"10.23919","author":[{"given":"Kamil","family":"Rudnicki","sequence":"first","affiliation":[]},{"given":"Tomasz P.","family":"Stefanski","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"ZedBoard (Zynq&#x2122; Evaluation and Development) Hardware User's Guide Version 1 1","year":"2012","key":"ref10"},{"journal-title":"Vivado Design Suite-AXI Reference Guide UG1037 (v4 0)","year":"2017","key":"ref11"},{"key":"ref12","first-page":"293","article-title":"Multiplication of many-digital numbers by automatic computers","volume":"145","author":"karatsuba","year":"1962","journal-title":"Proceedings of the USSR Academy of Sciences"},{"journal-title":"The art of computer programming volume 2 (3rd ed ) Seminumerical algorithms","year":"1997","author":"knuth","key":"ref13"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"281","DOI":"10.1007\/BF02242355","article-title":"Schnelle multiplikation grosser zahlen","volume":"7","author":"sch\u00f6nhage","year":"1971","journal-title":"Computing"},{"journal-title":"Vivado Design Suite User Guide Getting Started UG910 (v2017 1)","year":"2017","key":"ref15"},{"journal-title":"7 Series FPGAs Data Sheet Overview - Product Specification","year":"2018","key":"ref16"},{"key":"ref17","article-title":"The GNU multiple precision arithmetic library (Edition 6. 1. 2)","author":"granlund","year":"2016","journal-title":"GMP Development Team"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/AICCSA.2009.5069427"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MAP.2013.6529388"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-24151-2_10"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707899"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/12.859535"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1023\/B:VLSI.0000017001.88149.f4"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.amc.2012.03.087"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2005.52"},{"journal-title":"Zynq-7000 All Programmable SoC Data Sheet Overview-Product Specification DS190 (v1 11)","year":"2017","key":"ref9"}],"event":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","start":{"date-parts":[[2018,6,21]]},"location":"Gdynia","end":{"date-parts":[[2018,6,23]]}},"container-title":["2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8422065\/8436585\/08436868.pdf?arnumber=8436868","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T01:13:57Z","timestamp":1598231637000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8436868\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,6]]},"references-count":17,"URL":"https:\/\/doi.org\/10.23919\/mixdes.2018.8436868","relation":{},"subject":[],"published":{"date-parts":[[2018,6]]}}}