{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,31]],"date-time":"2024-10-31T03:13:06Z","timestamp":1730344386668,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,6]]},"DOI":"10.23919\/mixdes.2018.8436895","type":"proceedings-article","created":{"date-parts":[[2018,8,17]],"date-time":"2018-08-17T16:14:20Z","timestamp":1534522460000},"page":"204-208","source":"Crossref","is-referenced-by-count":0,"title":["Twofold State Assignment for LUT-based Mealy FSMs"],"prefix":"10.23919","author":[{"given":"Alexander","family":"Barkalov","sequence":"first","affiliation":[]},{"given":"Larysa","family":"Titarenko","sequence":"additional","affiliation":[]},{"given":"Kamil","family":"Mielcarek","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","volume":"38","author":"barkalov","year":"2015","journal-title":"Logic synthesis for FPGA-based Finite State Machines ser Studies in Systems Decision and Control"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s10559-012-9410-2"},{"journal-title":"Benchmarks test","article-title":"International Workshop on logic synthesis benchmark suite (LGSynth93)","year":"1993","key":"ref12"},{"key":"ref13","first-page":"1","article-title":"Design of emb-based moore fsms","volume":"26","author":"kolopic?czyk","year":"2017","journal-title":"Journal of Circuits Systems and Computers"},{"journal-title":"ISE Foundation","year":"0","key":"ref14"},{"key":"ref15","article-title":"SIS: a system for sequential circuit synthesis","author":"sentowich","year":"1992","journal-title":"Tech Rep"},{"journal-title":"DEMAIN","year":"2018","key":"ref16"},{"journal-title":"Altera","year":"0","key":"ref4"},{"journal-title":"Logic and System Design of Digital Systems","year":"2008","author":"baranov","key":"ref3"},{"journal-title":"FPGAs Instant access","year":"2008","author":"maxfield","key":"ref6"},{"journal-title":"Xilinx","year":"0","key":"ref5"},{"key":"ref8","volume":"294","author":"sklyarov","year":"2014","journal-title":"Synthesis and optimization of FPGA-based systems ser Lecture notes in electrical engineering"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3393-8"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/9780470987629"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-0504-8"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45716-X_36"}],"event":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","start":{"date-parts":[[2018,6,21]]},"location":"Gdynia","end":{"date-parts":[[2018,6,23]]}},"container-title":["2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8422065\/8436585\/08436895.pdf?arnumber=8436895","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,23]],"date-time":"2020-08-23T21:14:07Z","timestamp":1598217247000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8436895\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,6]]},"references-count":16,"URL":"https:\/\/doi.org\/10.23919\/mixdes.2018.8436895","relation":{},"subject":[],"published":{"date-parts":[[2018,6]]}}}