{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T03:24:50Z","timestamp":1729653890125,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,6]]},"DOI":"10.23919\/mixdes.2019.8787079","type":"proceedings-article","created":{"date-parts":[[2019,8,5]],"date-time":"2019-08-05T21:07:03Z","timestamp":1565039223000},"page":"151-156","source":"Crossref","is-referenced-by-count":0,"title":["A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology"],"prefix":"10.23919","author":[{"given":"Jakub","family":"Dalecki","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rafal","family":"Dlugosz","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tomasz","family":"Talaska","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gunter","family":"Fischer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JDT.2016.2526042"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2854849"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2007.4425703"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MIEL.2014.6842170"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCE.2018.8408905"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2015.7406951"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1002\/cpe.5179"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HNICEM.2015.7393192"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASICON.2015.7517104"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1998.704158"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cta.2008.0599"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MIXDES.2015.7208541"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/101.621603"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TENCONSpring.2013.6584457"},{"key":"ref1","article-title":"Double cascade digital to analogue converter for metrology testing","volume":"2","author":"kochan","year":"2014","journal-title":"IEEE instrumentation and measurement technology conference"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.1109\/MIEL.2014.6842190","article-title":"A new realization of the conscience mechanism for self-organizing neural networks implemented in CMOS technology","author":"tala?ka","year":"2014","journal-title":"Proc Int Conf Microelectronics (MIEL)"}],"event":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","start":{"date-parts":[[2019,6,27]]},"location":"Rzesz\u00f3w, Poland","end":{"date-parts":[[2019,6,29]]}},"container-title":["2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\""],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8777447\/8786996\/08787079.pdf?arnumber=8787079","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,12,4]],"date-time":"2019-12-04T21:23:23Z","timestamp":1575494603000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8787079\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6]]},"references-count":16,"URL":"https:\/\/doi.org\/10.23919\/mixdes.2019.8787079","relation":{},"subject":[],"published":{"date-parts":[[2019,6]]}}}