{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,31]],"date-time":"2024-10-31T03:19:24Z","timestamp":1730344764771,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,4]]},"DOI":"10.23919\/springsim.2019.8732866","type":"proceedings-article","created":{"date-parts":[[2019,6,10]],"date-time":"2019-06-10T21:18:07Z","timestamp":1560201487000},"page":"1-10","source":"Crossref","is-referenced-by-count":0,"title":["Comparing Frequency Scaling Efficacy on Different Memory Technologies"],"prefix":"10.23919","author":[{"given":"Vaibhav","family":"Sundriyal","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masha","family":"Sosonkina","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bryce M.","family":"Westheimer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"DDR3 Standard JESD79-3F","year":"2019","key":"ref10"},{"journal-title":"DDR4 Standard JESD79-4","year":"2019","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MEMC.2016.7866252"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2006.11"},{"key":"ref14","first-page":"23","article-title":"Lmbench: Portable Tools for Performance Analysis","author":"mcvoy","year":"1996","journal-title":"Proc of the 1996 Annual Conference on USENIX Annual Technical Conference"},{"journal-title":"DDR4 Memory","year":"2018","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1048935.1050191"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1002\/jcc.540141112"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-016-1680-4"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.230"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1065944.1065967"},{"journal-title":"Putting Your Data and Code in Order","year":"2019","author":"david january","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2009.76"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2007.29"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CCGRID.2009.88"},{"key":"ref7","first-page":"1","article-title":"A Power-Aware Run-Time System for High-Performance Computing","author":"hsu","year":"2005","journal-title":"Supercomputing 2005 Proceedings of the ACM\/IEEE SC 2005 Conference"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"18","DOI":"10.1109\/TCAD.2004.839485","article-title":"Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times","volume":"24","author":"choi","year":"2005","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2417540"},{"journal-title":"Memory Systems Cache DRAM Disk","year":"2007","author":"jacob","key":"ref9"},{"journal-title":"Intel Memory Latency Checker","year":"2017","author":"vishwanathan","key":"ref20"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2017.8009201"},{"journal-title":"Hitting the Memory Wall Implications of the Obvious","year":"1994","author":"wulf","key":"ref21"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.283"}],"event":{"name":"2019 Spring Simulation Conference (SpringSim)","start":{"date-parts":[[2019,4,29]]},"location":"Tucson, AZ, USA","end":{"date-parts":[[2019,5,2]]}},"container-title":["2019 Spring Simulation Conference (SpringSim)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8728125\/8732845\/08732866.pdf?arnumber=8732866","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,8]],"date-time":"2019-07-08T17:52:21Z","timestamp":1562608341000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8732866\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4]]},"references-count":23,"URL":"https:\/\/doi.org\/10.23919\/springsim.2019.8732866","relation":{},"subject":[],"published":{"date-parts":[[2019,4]]}}}