{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,4]],"date-time":"2025-04-04T04:22:15Z","timestamp":1743740535233,"version":"3.40.3"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100004358","name":"Samsung","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004358","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,11]]},"DOI":"10.23919\/vlsitechnologyandcir57934.2023.10185239","type":"proceedings-article","created":{"date-parts":[[2023,7,24]],"date-time":"2023-07-24T17:36:33Z","timestamp":1690220193000},"page":"1-2","source":"Crossref","is-referenced-by-count":0,"title":["A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications"],"prefix":"10.23919","author":[{"given":"Sekeon","family":"Kim","sequence":"first","affiliation":[{"name":"Yonsei University,Seoul,Korea"}]},{"given":"Keonhee","family":"Cho","sequence":"additional","affiliation":[{"name":"Yonsei University,Seoul,Korea"}]},{"given":"Kyeongrim","family":"Baek","sequence":"additional","affiliation":[{"name":"Yonsei University,Seoul,Korea"}]},{"given":"Hyunjun","family":"Kim","sequence":"additional","affiliation":[{"name":"Design Enablement Team, Samsung Electronics Co., Ltd."}]},{"given":"Younmee","family":"Bae","sequence":"additional","affiliation":[{"name":"Design Enablement Team, Samsung Electronics Co., Ltd."}]},{"given":"Mijung","family":"Kim","sequence":"additional","affiliation":[{"name":"Design Enablement Team, Samsung Electronics Co., Ltd."}]},{"given":"Dongwook","family":"Seo","sequence":"additional","affiliation":[{"name":"Design Enablement Team, Samsung Electronics Co., Ltd."}]},{"given":"Sangyeop","family":"Baeck","sequence":"additional","affiliation":[{"name":"Design Enablement Team, Samsung Electronics Co., Ltd."}]},{"given":"Sungjae","family":"Lee","sequence":"additional","affiliation":[{"name":"Design Enablement Team, Samsung Electronics Co., Ltd."}]},{"given":"Seong-Ook","family":"Jung","sequence":"additional","affiliation":[{"name":"Yonsei University,Seoul,Korea"}]}],"member":"263","reference":[{"volume-title":"TVLSI\u201994","author":"Hossain","key":"ref1"},{"volume-title":"ISSCC\u201911","author":"Teh","key":"ref2"},{"volume-title":"ISSCC\u201914","author":"Kim","key":"ref3"},{"volume-title":"JSSC\u201921","author":"Shin","key":"ref4"},{"volume-title":"ISCAS\u201915","author":"Bonetti","key":"ref5"}],"event":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","start":{"date-parts":[[2023,6,11]]},"location":"Kyoto, Japan","end":{"date-parts":[[2023,6,16]]}},"container-title":["2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10185199\/10185158\/10185239.pdf?arnumber=10185239","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,3]],"date-time":"2025-04-03T17:43:31Z","timestamp":1743702211000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10185239\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,11]]},"references-count":5,"URL":"https:\/\/doi.org\/10.23919\/vlsitechnologyandcir57934.2023.10185239","relation":{},"subject":[],"published":{"date-parts":[[2023,6,11]]}}}