{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T16:43:09Z","timestamp":1774716189464,"version":"3.50.1"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,11]]},"DOI":"10.23919\/vlsitechnologyandcir57934.2023.10185388","type":"proceedings-article","created":{"date-parts":[[2023,7,24]],"date-time":"2023-07-24T17:36:33Z","timestamp":1690220193000},"page":"1-2","source":"Crossref","is-referenced-by-count":3,"title":["Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS\/W DSPs with 1.7Tbps\/mm<sup>2<\/sup> AIB 2.0 Interface to Provide Versatile Workload Acceleration"],"prefix":"10.23919","author":[{"given":"Wei","family":"Tang","sequence":"first","affiliation":[{"name":"University of Michigan"}]},{"given":"Sung-Gun","family":"Cho","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Tim Tri","family":"Hoang","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Jacob","family":"Botimer","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Wei Qiang","family":"Zhu","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Ching-Chi","family":"Chang","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Cheng-Hsun","family":"Lu","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Junkang","family":"Zhu","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Yaoyu","family":"Tao","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Tianyu","family":"Wei","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Naomi Kavi","family":"Motwani","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Mani","family":"Yalamanchi","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Ramya","family":"Yarlagadda","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Sirisha","family":"Kale","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Mark","family":"Flanigan","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Allen","family":"Chan","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Thungoc","family":"Tran","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Sergey","family":"Shumarayev","sequence":"additional","affiliation":[{"name":"Intel corporation"}]},{"given":"Zhengya","family":"Zhang","sequence":"additional","affiliation":[{"name":"University of Michigan"}]}],"member":"263","reference":[{"key":"ref7","author":"poulton","year":"2019","journal-title":"ISSCC"},{"key":"ref4","author":"rathore","year":"2022","journal-title":"ISSCC"},{"key":"ref3","author":"razavi","year":"2015","journal-title":"MSSC"},{"key":"ref6","author":"lin","year":"2010","journal-title":"ISSCC"},{"key":"ref5","author":"vivet","year":"2021","journal-title":"ISSCC"},{"key":"ref2","author":"cho","year":"2021","journal-title":"VLSI"},{"key":"ref1","year":"0"}],"event":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","location":"Kyoto, Japan","start":{"date-parts":[[2023,6,11]]},"end":{"date-parts":[[2023,6,16]]}},"container-title":["2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10185199\/10185158\/10185388.pdf?arnumber=10185388","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,24]],"date-time":"2023-07-24T21:09:25Z","timestamp":1690232965000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10185388\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,11]]},"references-count":7,"URL":"https:\/\/doi.org\/10.23919\/vlsitechnologyandcir57934.2023.10185388","relation":{},"subject":[],"published":{"date-parts":[[2023,6,11]]}}}