{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,12]],"date-time":"2026-03-12T14:38:58Z","timestamp":1773326338245,"version":"3.50.1"},"reference-count":22,"publisher":"University of Zielona G\u00f3ra, Poland","issue":"4","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,12,1]]},"abstract":"Synthesis of finite state machines for CPLDs<\/jats:title>The paper presents a new two-step approach to FSM synthesis for PAL-based CPLDs that strives to find an optimum fit of an FSM to the structure of the CPLD. The first step, the original state assignment method, includes techniques of two-level minimization and aims at area minimization. The second step, PAL-oriented multi-level optimization, is a search for implicants that can be shared by several functions. It is based on the graph of outputs. Results of experiments prove that the presented approach is especially effective for PAL-based CPLD structures containing a low number of product terms.<\/jats:p>","DOI":"10.2478\/v10006-009-0052-0","type":"journal-article","created":{"date-parts":[[2010,1,8]],"date-time":"2010-01-08T18:19:33Z","timestamp":1262974773000},"page":"647-659","source":"Crossref","is-referenced-by-count":13,"title":["Synthesis of finite state machines for CPLDs"],"prefix":"10.61822","volume":"19","author":[{"given":"Robert","family":"Czerwi\u0144ski","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dariusz","family":"Kania","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"37438","reference":[{"key":"1","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-2692-6","volume-title":"Logic Synthesis for Control Automata","author":"S. Baranov","year":"1994"},{"issue":"4","key":"2","doi-asserted-by":"crossref","first-page":"565","DOI":"10.2478\/v10006-007-0046-8","article-title":"Reduction in the number of PAL macrocells in the circuit of a Moore FSM","volume":"17","author":"A. Barkalov","year":"2007","journal-title":"International Journal of Applied Mathematics and Computer Science"},{"issue":"45","key":"3","doi-asserted-by":"crossref","first-page":"147","DOI":"10.1049\/ip-cdt:20010666","article-title":"Low power state assignment and flipflop selection for finite state machine synthesis\u2014A genetic algorithmic approach","volume":"148","author":"S. Chattopadhyay","year":"2001","journal-title":"IEE Proceedings\u2014Computers and Digital Techniques"},{"key":"4","first-page":"359","article-title":"Evolutionary algorithm for state assignment of finite state machines","author":"M. Chy\u017cy","year":"2002"},{"key":"5","first-page":"127","article-title":"State assignment for PAL-based CPLDs","author":"R. Czerwi\u0144ski","year":"2005"},{"issue":"4","key":"6","first-page":"479","article-title":"FSMs state encoding targeting at logic level minimization","volume":"54","author":"R. Czerwi\u0144ski","year":"2006","journal-title":"Bulletin of the Polish Academy of Sciences"},{"key":"7","first-page":"27","article-title":"State machine description oriented towards effective usage of vendor-independent synthesis tool","author":"R. Czerwi\u0144ski","year":"2009"},{"key":"8","unstructured":"Czerwi\u0144ski, R. (2006). The FSMs State Assignment for PAL-Based Matrix Programmable Structures<\/i>, Ph.D. thesis, Silesian University of Technology, Gliwice, (in Polish)."},{"key":"9","volume-title":"Synthesis and Optimization of Digital Circuits","author":"G. De Micheli","year":"1994"},{"issue":"1","key":"10","doi-asserted-by":"crossref","first-page":"13","DOI":"10.1109\/43.62788","article-title":"Exact algorithms for output encoding, state assignment and four-level boolean minimization","volume":"10","author":"S. Devadas","year":"1991","journal-title":"IEEE Transactions on Computer-Aided Design"},{"key":"11","first-page":"258","article-title":"Efficient decomposition of assigned sequential machines and boolean functions for PLD implementations","author":"L. J\u00f3\u017awiak","year":"1995"},{"issue":"3","key":"12","doi-asserted-by":"crossref","first-page":"143","DOI":"10.1049\/ip-cdt:20030223","article-title":"An efficient approach to synthesis of multi-output boolean functions on PAL-based devices","volume":"150","author":"D. Kania","year":"2003","journal-title":"IEE Proceedings on Computer and Digital Techniques"},{"key":"13","volume-title":"The Logic Synthesis for the PAL-based Complex Programmable Logic Devices","author":"D. Kania","year":"2004"},{"key":"14","unstructured":"MCNC (1991). LGSynth'91 benchmarks, Collaborative Benchmarking Laboratory, Department of Computer Science at North Carolina State University, Raleigh, NC http:\/\/www.cbl.ncsu.edu\/<\/a>"},{"issue":"17","key":"15","doi-asserted-by":"crossref","first-page":"948","DOI":"10.1049\/el:20052307","article-title":"Patitioned state encoding for low power in FPGAs","volume":"41","author":"L. Mengibar","year":"2005","journal-title":"Electronics Letters"},{"issue":"18","key":"16","doi-asserted-by":"crossref","first-page":"1527","DOI":"10.1049\/el:20001086","article-title":"Optimal state assignment technique for partial scan designs","volume":"36","author":"S. Park","year":"2000","journal-title":"Electronics Letters"},{"issue":"6","key":"17","first-page":"44","article-title":"Experimental Studies of Finite State Machines Synthesis Methods Implemented in Package ZUBR","volume":"52","author":"V. Salauyou","year":"2006","journal-title":"Pomiary, Automatyka, Kontrola"},{"key":"18","unstructured":"Sentovich, E., Singh, K., Moon, C., Savoj, H., Brayton, R. and Sangiovanni-Vincentelli, A. (1992). SIS: A system for sequential circuit synthesis, Technical report<\/i>, University of California, Berkeley, CA."},{"key":"19","volume-title":"Programmable Logic Handbook, PLDs, CPLDs, & FPGAs","author":"K. Sharma","year":"1998"},{"key":"20","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-6155-2","volume-title":"Synthesis of Finite State Machines: Logic Optimization","author":"T. Villa","year":"1997"},{"issue":"9","key":"21","doi-asserted-by":"crossref","first-page":"905","DOI":"10.1109\/43.59068","article-title":"NOVA: State assignment for finite state machines for optimal two-level logic implementation","volume":"9","author":"T. Villa","year":"1990","journal-title":"IEEE Transactions on Computer-Aided Design"},{"issue":"1","key":"22","doi-asserted-by":"crossref","first-page":"4","DOI":"10.1109\/43.62787","article-title":"Optimum and suboptimum algorithms for input encoding and its relationship to logic minimization","volume":"10","author":"S. Yang","year":"1991","journal-title":"IEEE Transactions on Computer-Aided Design"}],"container-title":["International Journal of Applied Mathematics and Computer Science"],"original-title":[],"link":[{"URL":"http:\/\/content.sciendo.com\/view\/journals\/amcs\/19\/4\/article-p647.xml","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/www.degruyter.com\/view\/j\/amcs.2009.19.issue-4\/v10006-009-0052-0\/v10006-009-0052-0.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,29]],"date-time":"2024-02-29T10:27:04Z","timestamp":1709202424000},"score":1,"resource":{"primary":{"URL":"https:\/\/content.sciendo.com\/doi\/10.2478\/v10006-009-0052-0"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,12,1]]},"references-count":22,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.2478\/v10006-009-0052-0","relation":{},"ISSN":["1641-876X"],"issn-type":[{"value":"1641-876X","type":"print"}],"subject":[],"published":{"date-parts":[[2009,12,1]]}}}